Abstract: In a thin film transistor using a polycrystalline semiconductor film, when a storage capacitor is formed, it is often that a polycrystalline semiconductor film is used also in one electrode of the capacity. In a display device having a storage capacitor and thin film transistor which have a polycrystalline semiconductor film, the storage capacitor exhibits a voltage dependency due to the semiconductor film, and hence a display failure is caused. In the display device of the invention, a metal conductive film 5 is stacked above a semiconductor layer 4d made of a polycrystalline semiconductor film which is used as a lower electrode of a storage capacitor 130.

Abstract: A thin film transistor substrate includes a thin film transistor of a first conductivity type, a semiconductor layer having a channel region of the first conductivity type placed between the source/drain regions, a gate electrode formed to an opposite face to the semiconductor layer with an gate insulating film interposed therebetween, an opening in the gate electrode corresponding to both edges in a channel width direction of the channel region. In the channel region corresponding to the opening, a highly concentrated impurity region having a higher impurity concentration of the first conductivity type than the channel corresponding to the gate electrode is formed.

Abstract: A thin film transistor array substrate in accordance with the present invention comprising a semiconductor layer formed over the substrate and having source/drain regions, a gate insulating film, a gate electrode, an interlayer insulating film, wiring electrodes connected to the source/drain regions, a protective film, a pixel electrode connected to the wiring electrode, a lower capacitor electrode formed with and extending from the semiconductor layer, a common line electrode formed from the same layer as the gate electrode and arranged in the opposed position to the lower capacitor electrode with the gate insulating film interposed therebetween, and an upper capacitor electrode arranged in the opposed position to the common line electrode with a dielectric film (protective film) having film thickness thinner than the interlayer insulating film interposed therebetween.

Abstract: A thin film transistor device includes a semiconductor layer including a source region, a drain region and a channel region formed above a substrate, a metal film formed in a prescribed area on the semiconductor layer, a gate insulating film formed on the metal film and the semiconductor layer, a gate electrode, an interlayer insulating film, and a line electrode. The metal film is formed on the source region and the drain region of the semiconductor layer, the area being at least a bottom of the contact hole. The thickness of the semiconductor layer in a region on which the metal film is not formed is smaller than the thickness of the semiconductor layer in a region on which the metal film is formed.

Abstract: A thin film transistor substrate includes a first conductive layer formed on a substrate, an anti-diffusion layer deposited on the first conductive layer, a semiconductor layer formed on the anti-diffusion layer, a gate insulating layer deposited on the semiconductor layer, a second conductive layer formed on the gate insulating layer, an interlayer insulating layer deposited on the second conductive layer, and a third conductive layer formed on the interlayer insulating layer, in a first contact hole penetrating through the interlayer insulating layer and the gate insulating layer to reach the semiconductor layer, and in a second contact hole penetrating through the interlayer insulating layer, the gate insulating layer and the anti-diffusion layer to reach the first conductive layer. The third conductive layer includes a pixel electrode formed in island shape on the interlayer insulating layer.

Abstract: In a thin film transistor using a polycrystalline semiconductor film, when a storage capacitor is formed, it is often that a polycrystalline semiconductor film is used also in one electrode of the capacity. In a display device having a storage capacitor and thin film transistor which have a polycrystalline semiconductor film, the storage capacitor exhibits a voltage dependency due to the semiconductor film, and hence a display failure is caused. In the display device of the invention, a metal conductive film 5 is stacked above a semiconductor layer 4d made of a polycrystalline semiconductor film which is used as a lower electrode of a storage capacitor 130.

Abstract: A display device includes a substrate, a gate insulating film provided over the substrate and disposed between a semiconductor layer and a first conductive layer including a capacitor electrode and a gate electrode, an interlayer insulating film formed over the semiconductor layer, the first conductive layer and the gate insulating film, a second conductive layer having a signal line formed over the interlayer insulating film, a protective film formed over the interlayer insulating film and the second conductive layer and a pixel electrode layer formed over the protective film. The semiconductor layer and the second conductive layer are connected via the pixel electrode layer by the pixel electrode layer penetrating the protective film to reach the second conductive layer and also penetrating the protective film, the interlayer insulating film and the gate insulating film to reach the semiconductor layer.

Abstract: A thin film transistor substrate includes a first conductive layer formed on a substrate, an anti-diffusion layer deposited on the first conductive layer, a semiconductor layer formed on the anti-diffusion layer, a gate insulating layer deposited on the semiconductor layer, a second conductive layer formed on the gate insulating layer, an interlayer insulating layer deposited on the second conductive layer, and a third conductive layer formed on the interlayer insulating layer, in a first contact hole penetrating through the interlayer insulating layer and the gate insulating layer to reach the semiconductor layer, and in a second contact hole penetrating through the interlayer insulating layer, the gate insulating layer and the anti-diffusion layer to reach the first conductive layer. The third conductive layer includes a pixel electrode formed in island shape on the interlayer insulating layer.

Abstract: A thin film transistor substrate includes a thin film transistor of a first conductivity type, a semiconductor layer having a channel region of the first conductivity type placed between the source/drain regions, a gate electrode formed to an opposite face to the semiconductor layer with an gate insulating film interposed therebetween, an opening in the gate electrode corresponding to both edges in a channel width direction of the channel region. In the channel region corresponding to the opening, a highly concentrated impurity region having a higher impurity concentration of the first conductivity type than the channel corresponding to the gate electrode is formed.

Abstract: A substrate drying device according to an embodiment of the present invention includes: a nozzle ejecting a fluid to a substrate to be processed, wherein the substrate is moved relative to the nozzle while the nozzle is spraying the fluid to dry the substrate, a parallel component to a surface of the substrate in an ejection direction of the fluid is inclined with respect to a moving direction in which the substrate moves relative to the nozzle, and an angle between the parallel component and the moving direction is changed at a changed portion in a predetermined position of the nozzle.

Abstract: A wiring layer dry etching method is improved not to reduce electrical characteristics of a semiconductor device. A semiconductor substrate on which a mask for patterning a wiring layer is formed is prepared, in which mask is formed on wiring layer (a first step). Affected layers on a surface of the wiring layer are dry-etched and removed (second step). Wiring layer is dry-etched by using mask (third step). When shifting is performed from the second step to the third step, vacuuming is not performed, and continuous discharge is performed.

Abstract: A wiring layer dry etching method is improved not to reduce electrical characteristics of a semiconductor device. A semiconductor substrate on which a mask for patterning a wiring layer is formed is prepared, in which mask is formed on wiring layer (a first step). Affected layers on a surface of the wiring layer are dry-etched and removed (second step). Wiring layer is dry-etched by using mask (third step). When shifting is performed from the second step to the third step, vacuuming is not performed, and continuous discharge is performed.