Patents by Inventor Atsuo Fukuda

Atsuo Fukuda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8866183
    Abstract: An LED module includes: a package having electrodes provided on the outer surface of opposing sidewalls, and a light-emitting element connected to the electrodes and mounted on the package; a base member having a copper metal; an insulating layer stacked on the surface of the base member and having an insulating material; and a conductive wiring pattern connected to the electrodes by soldering and formed on the surface of the insulating layer. The insulating layer has a through-hole formed by removing a part of the section where the package is positioned, and a heat dissipation unit formed by soldering between the back surface of the package and the base member, which face one another with the through-hole interposed therebetween.
    Type: Grant
    Filed: September 26, 2011
    Date of Patent: October 21, 2014
    Assignee: Panasonic Industrial Devices Sunx Co., Ltd.
    Inventors: Sachio Higuchi, Takashi Tanaka, Mitunori Mizoguti, Tsuyoshi Inui, Atsuo Fukuda
  • Publication number: 20130181251
    Abstract: An LED module includes: a package having electrodes provided on the outer surface of opposing sidewalls, and a light-emitting element connected to the electrodes and mounted on the package; a base member having a copper metal; an insulating layer stacked on the surface of the base member and having an insulating material; and a conductive wiring pattern connected to the electrodes by soldering and formed on the surface of the insulating layer. The insulating layer has a through-hole formed by removing a part of the section where the package is positioned, and a heat dissipation unit formed by soldering between the back surface of the package and the base member, which face one another with the through-hole interposed therebetween.
    Type: Application
    Filed: September 26, 2011
    Publication date: July 18, 2013
    Applicant: PANASONIC INDUSTRIAL DEVICES SUNX CO., LTD.
    Inventors: Sachio Higuchi, Takashi Tanaka, Mitunori Mizoguti, Tsuyoshi Inui, Atsuo Fukuda
  • Patent number: 6127870
    Abstract: An output delay circuit has a counter which is reset at every input of an input signal of a first signal state thereto and counts input clocks while the input signal of a second signal state is inputted thereto; a comparator for comparing an accumulated number of the input clocks having been counted by the counter with a predetermined clock number set in advance; and a logic circuit for, when it is determined by the comparator that the accumulated number of the input clocks is less than the predetermined clock number, outputting an output signal having a signal state same as the first signal state of the input signal, while for, when it is determined by the comparator that the accumulated number of the input clocks is not less than the predetermined clock number, outputting an output signal having a signal state same as the second signal state of the input signal
    Type: Grant
    Filed: July 23, 1998
    Date of Patent: October 3, 2000
    Assignee: Matsushita Electric Works, Ltd.
    Inventor: Atsuo Fukuda
  • Patent number: 5862405
    Abstract: A unit address is automatically set in a peripheral unit. A plurality of peripheral units 1 are connected to a CPU unit via a signal line 3. The CPU unit accesses each peripheral unit 1 by individually selecting the peripheral units. The signal line 3 is provided with a first signal line 31 for transmitting an address by bus connection of the peripheral units and a second signal 32 line for transmitting a write command signal by cascade connection of the peripheral units 1. The write command signal is sequentially transmitted in the order in which the peripheral units 1 are connected, and only the peripheral unit 1 that has received the write command signal receives a unit address and retains it in a latch circuit 11a.
    Type: Grant
    Filed: November 18, 1996
    Date of Patent: January 19, 1999
    Assignee: Matsushita Electric Works, Ltd.
    Inventors: Atsuo Fukuda, Yasuo Masuo
  • Patent number: 5793733
    Abstract: A polarizing beam-splitter comprises an optically isotropics crystalline substrate and a birefringent material layer made of an oriented polydiacetylene film formed on the optically isotropic crystalline substrate. A periodic grating photo-mask is formed in the birefringent material layer by an area that is changed into a different color phase when an ultra violet light is irradiated in a predetermined pattern on the birefringent material layer and by an area in which the color remains unchanged. The periodic grating photo-mask has a diffraction efficiency for the orientation of the oriented polydiacetylene film in the area that is changed into a different color phase which is lower than that in the area in which the color is unchanged.
    Type: Grant
    Filed: August 23, 1996
    Date of Patent: August 11, 1998
    Assignee: Sankyo Seiki Mfg. Co., Ltd.
    Inventors: Tadashi Takeda, Yoshio Hayashi, Satoru Nakao, Hideo Takezoe, Ken Ishikawa, Takaaki Suzuki, Atsuo Fukuda