Abstract: A method of manufacturing a semiconductor device disclosed herein includes: mounting a substrate on an electrostatic chuck placed inside a chamber, the electrostatic chuck having a first temperature and the substrate being retained in advance in an atmosphere having a second temperature lower than the first temperature; fixing the substrate onto the electrostatic chuck by applying a voltage to the electrostatic chuck; heating the electrostatic chuck to a third temperature higher than the first temperature and the second temperature after mounting the substrate; and processing the substrate after the heating.

Abstract: A method of manufacturing a semiconductor device disclosed herein includes: mounting a substrate on an electrostatic chuck placed inside a chamber, the electrostatic chuck having a first temperature and the substrate being retained in advance in an atmosphere having a second temperature lower than the first temperature; fixing the substrate onto the electrostatic chuck by applying a voltage to the electrostatic chuck; heating the electrostatic chuck to a third temperature higher than the first temperature and the second temperature after mounting the substrate; and processing the substrate after the heating.

Abstract: An inspecting method increases the accuracy of a DSA (Defect Source Analysis) for thereby increasing the yield of semiconductor devices which are manufactured. For performing a DSA using data of a defect inspecting process obtained when wiring patterns are formed on a wafer and data of a VC (Voltage Contrast) inspecting process performed after the wiring patterns are formed, a rectangular DSA area is established in relation to a wiring pattern in which a nonconductive area is detected, based on the shape of the wiring pattern. For example, if three defects are detected in the defect inspecting process, then it is possible to select only at least one of those defects which affects the wiring pattern in the DSA area. Since fabrication steps can appropriately be evaluated based on the selected defect, suitable actions may be taken for any problematic fabrication step based on the evaluation of the fabrication steps.

Abstract: An inspecting method increases the accuracy of a DSA for thereby increasing the yield of semiconductor devices which are manufactured. For performing a DSA using the data of a defect inspecting process obtained when wiring patterns are formed on a wafer and the dada of a VC inspecting process performed after the wiring patterns are formed, a rectangular DSA area is established in surrounding relation to a wiring pattern in which a nonconductive area is detected, based on the shape of the wiring pattern. For example, if three defects are detected in the defect inspecting process, then it is possible to select only at least one of those defects which affects the wiring pattern in the DSA area. Since fabrication steps can appropriately be evaluated based on the selected defect, suitable necessary actions or countermeasures may be taken for any problematic fabrication step based on the evaluation of the fabrication steps, so that high-performance, high-quality semiconductor devices can be manufactured.

Abstract: A method of manufacturing a semiconductor device with a silicide electrode is provided which can form a good contact even at a scaled-down pattern. The method includes the steps of: forming an insulated gate structure with side wall spacer on a p-type region of a silicon (Si) substrate; implanting arsenic ions in source/drain regions at a dose less than 5×1015 cm−2; forming a laminated layer of a Co film and a TiN film on the surface of the substrate; heating the substrate to let the Co film react with an underlying Si region for silicidation; and removing the TiN film.

Abstract: A manufacturing method of a semiconductor device of the present invention comprises the steps of forming an amorphous layer on an upper layer of the impurity diffusion layer made of silicon by virtue of ion-implantation, forming a cobalt film on the impurity diffusion layer, forming a cobalt silicide layer made of Co.sub.2 Si or CoSi on an upper layer of the amorphous layer at a low temperature by reacting the cobalt film to silicon in the impurity diffusion layer in virtue of first annealing, then removing the cobalt film which has not reacted, and changing Co.sub.2 Si or CoSi constituting the cobalt silicide layer into CoSi.sub.2 to have low resistance and also rendering the cobalt silicide layer to enter into a depth identical to or deeper than an initial depth of the amorphous layer in virtue of second annealing.

Abstract: On a semiconductor substrate with an exposed silicon region, a metal layer such as Co is deposited and a silicide layer is formed by heat treatment. Thereafter, a metal layer such as Ni and a silicon layer are deposited, and one of them is patterned. The metal layer and silicon layer are heated for silicification to form a local interconnect. A semiconductor device manufacturing method is provided which uses salicide technique and can form a local interconnect of good quality.

Abstract: A method of manufacturing a semiconductor substrate with a silicide electrode (interconnection) capable of forming a local interconnection by using a silicide formation technique. The method includes the steps of: selectively oxidizing the surface of a silicon semiconductor substrate to form a local oxide film and to define at least partially a silicon surface; depositing a cobalt film covering the silicon surface and local oxide film; depositing a silicon film on the cobalt film, and patterning the silicon film to form a silicon film pattern extending from the silicon surface to the local oxide film; forming a TiN film over the cobalt film; heating the substrate to progress a silicidation reaction between the cobalt film and silicon surface and between the cobalt film and silicon film pattern; and removing the remaining TiN film and an unreacted portion of the cobalt film.

Abstract: A method of manufacturing a semiconductor substrate with a silicide electrode (interconnection) capable of forming a local interconnection by using a silicide formation technique. The method includes the steps of: selectively oxidizing the surface of a silicon semiconductor substrate to form a local oxide film and to define at least partially a silicon surface; depositing a cobalt film covering the silicon surface and local oxide film; depositing a silicon film on the cobalt film, and patterning the silicon film to form a silicon film pattern extending from the silicon surface to the local oxide film; forming a TiN film over the cobalt film; heating the substrate to progress a silicidation reaction between the cobalt film and silicon surface and between the cobalt film and silicon film pattern; and removing the remaining TiN film and an unreacted portion of the cobalt film.