Abstract: A video playback apparatus includes: video data inputting unit; a ranking data inputting/generating unit that inputs or generates ranking data where scenes in video data are ranked according to importance; a playback scene determination parameter inputting unit that inputs parameters when determining scenes to be played back according to importance; a playback scene determining unit that determines playback scenes based on ranking data and playback scene determination parameters; and a display unit that displays playback scenes. A viewing time of video data that the user desires and a maximum time width of each playback scene are inputted to the playback scene determination parameter inputting unit, and the playback scene determining unit cuts scenes so that the playback time of the playback scenes fits the maximum time width, and determines the playback scenes so that the sum of the playback time of the playback scenes fits within the viewing time.

Abstract: An apparatus and a control method for an apparatus includes: a tuner for transmitting a demodulation signal which is a signal generated by demodulating a receiving signal of a digital broadcast; a digital signal processor for decoding the demodulation signal and transmitting a first video signal to an external device; a general-purpose processor for generating a second video signal to be synthesized with the first video signal; a video signal synthesizing circuit for synthesizing the second video signal with the first video signal; and a user interface for accepting from the external device an input of a starting signal which is a signal instructing a start of video signal output. The digital signal processor and the general-purpose processor start respective boot sequences in response to the acceptance of input of the starting signal by the user interface, and the digital signal processor starts the decoding of the demodulation signal before the boot sequence of the general-purpose processor is completed.

Abstract: An integrated multimedia system has a multimedia processor disposed in an integrated circuit. The system comprises a first host processor system which is coupled to the multimedia processor. A second local processor is disposed within the multimedia processor which controls the operation of the multimedia processor. A data transfer switch is disposed within the multimedia processor and coupled to the second processor which transfers data to various modules of the multimedia processor. A fixed function unit is disposed within the multimedia processor, coupled to the second processor and the data transfer switch and configured to perform three dimensional graphic operations.

Abstract: An integrated multimedia system has a multimedia processor disposed in an integrated circuit. The system comprises a first host processor system which is coupled to the multimedia processor. A second local processor is disposed within the multimedia processor which controls the operation of the multimedia processor. A data transfer switch is disposed within the multimedia processor and coupled to the second processor which transfers data to various modules of the multimedia processor. A fixed function unit is disposed within the multimedia processor, coupled to the second processor and the data transfer switch and configured to perform three dimensional graphic operations.

Abstract: Disclosed is a data stream processor that allows both the coder side and the decoder side to obtain reference time information needed to generate a reference frequency from the same external reference time station, and uses the same frequency for encoding and decoding. The invention is particularly useful when a plurality of data streams data are received and decoded. A decoder side performs decoding at the same frequency as a reference frequency for each coder side that generated the stream data, because if the same frequency is not used for encoding, stream data will be lost or insufficient in a decoder's buffer for storing stream data. This causes errors such as repeating audiovisual data, missing frames, etc. When the reference time needed for the decoder side to adjust frequencies is embedded in each stream data, it is difficult to adjust frequencies for all the stream data.

Abstract: The present invention relates to a storage device provided with a file system for managing operations to record and reproduce data in file units in concentrated accesses made by a plurality of client apparatuses to the storage device through a network. A digital watermark can be embedded into file data handled by the storage device. Parameters required for embedding a digital watermark and digital-watermark-embedding algorithms are managed concentratedly by the storage device.

Abstract: An integrated multimedia system has a multimedia processor disposed in an integrated circuit. The system comprises a first host processor system which is coupled to the multimedia processor. A second local processor is disposed within the multimedia processor which controls the operation of the multimedia processor. A data transfer switch is disposed within the multimedia processor and coupled to the second processor which transfers data to various modules of the multimedia processor. A fixed function unit is disposed within the multimedia processor, coupled to the second processor and the data transfer switch and configured to perform three dimensional graphic operations. A data streamer is coupled to the data transfer switch, and configured to schedule simultaneous data transfers among a plurality of modules disposed within the multimedia processor in accordance with the corresponding channel allocations.

Abstract: A method of managing a memory area, in a data processing system, comprising providing a managing information memory area for items of in use, test done, and temporary fault of pages in a page table for managing a memory unit. In accordance with such a scheme, when a page is allocated to a program, an operation test is conducted on a page not tested, the time when the operation test has been conducted is recorded, and an operation test is again conducted on a page for which a predetermined time has passed since the last test performed thereat. Also, the values of output signals of main and sub memory modules of the data processing system are compared while the data processing system is operating, and if a difference is found, that is, non-coincidence is detected, this difference is detected as a fault by the test.

Abstract: This invention relates to the data processing system which provides, for example, data protection in units smaller than the page or the segment in a more flexible form without causing a marked decrease in efficiency. The conventional data word array has added thereto auxiliary memory bit array and a control unit, such that when a data word is read or updated, the execution of the program is interrupted according to the value of an auxiliary memory bit and a predetermined procedure is called. In this way, the set value of the auxiliary memory bit is used to specify that the processing is to be interrupted each time a data word with the set bit value is read or written.

Abstract: A semiconductor memory IC including an address value register, an adder and an address difference signal line, wherein an address for operation of the semiconductor memory IC is specified by an address difference signal representing an increment/decrement of the address value register An optional address can be specified by an increment/decrement signal, and all memory cells can be addressed even though the number of terminals is smaller than that required for specifying an absolute value of an address, so that the semiconductor memory IC can be reduced in size. To form a semiconductor memory device by using this semiconductor memory IC, an address memory unit, an address value difference computing unit and an addressing unit are provided. When operating the memory device, a target address in the memory unit can be reached by specifying a difference between the target address and the address held in the address memory unit.