Abstract: A foreign object detection device for a coil device including a second coil to transmit power to a first coil wirelessly or receive power from the first coil wirelessly including: a foreign object detection coil configured to be located between the first coil and the second coil; and a cover configured to cover an upper portion of the foreign object detection coil, wherein a top surface of the cover includes at least one inclined surface inclined relative to a coil plane of the second coil, and the inclined surface is inclined downward from a low sensitivity region where detection sensitivity of the foreign object detection coil is relatively lower to a high sensitivity region where the detection sensitivity of the foreign object detection coil is relatively higher.

Abstract: An electronic device according to an embodiment includes a display control unit, a detection unit, and an instruction unit. The display control unit displays a first user interface related to start of actuation of a target system, or a second user interface related to a function other than the start of actuation of the target system on a touch panel. The detection unit detects an operation of the first user interface or the second user interface. The instruction unit transmits an instruction signal according to the detected operation to the target system. A first time interval from an operation of the first user interface to a transmission of a first instruction signal for the start of actuation is longer than a second time interval from an operation of the second user interface to a transmission of a second instruction signal for the other function.

Abstract: A foreign object detection device for a coil device including a second coil to transmit power to a first coil wirelessly or receive power from the first coil wirelessly including: a foreign object detection coil configured to be located between the first coil and the second coil; and a cover configured to cover an upper portion of the foreign object detection coil, wherein a top surface of the cover includes at least one inclined surface inclined relative to a coil plane of the second coil, and the inclined surface is inclined downward from a low sensitivity region where detection sensitivity of the foreign object detection coil is relatively lower to a high sensitivity region where the detection sensitivity of the foreign object detection coil is relatively higher.

Abstract: In a moving image encoding apparatus of this invention, a generated bit amount extracting section (21) counts generated bits of variable-length-encoded data in units of macroblocks, and a reference generated bit count is set in a parameter value control section (22) as an update condition for a parameter value in each block. The boundary value of the parameter value is set in an intra/inter determination section (23) as a criterion for selection of the intra-encoding mode. In the inter-frame encoding mode, the parameter value control section (22) updates the parameter value of a block in which the generated bit count value of encoded data obtained by the generated bit amount extracting section (21) exceeds a reference value. The intra/inter determination section (23) determines that the influence of a data error is large in a block in which the parameter value is continuously updated and exceeds the boundary value, and switches the current mode to the intra-encoding mode to perform refresh operation.

Abstract: A method for decoding time data comprising decoding an encoded bit stream in units of one frame to generate decoded video data and a plurality of decoded header information items for each frame, detecting the time data included in each of the header information items, and determining identical time data which define identical points of time and are detected from at least two of the header information items as frame time data determining the point of time for outputting the decoded frame.

Abstract: Moving image signal decoder section decodes the moving image bit stream and the time stamp for reproduction transmitted from multiple separator section on a frame by frame basis and stored in input buffer and provides time control section with the time stamp for reproduction that corresponds to the decoded frame and the information on the time stamp in the header of the moving image bit stream, while storing the decoded image data in frame memory. The time control section transmits a request to image output section for outputting image data at the time specified by the time stamp for reproduction as transmitted from the moving image signal decoder section or at the time as determined on the basis of the time stamp of the moving image itself and causes the image data to be read out of the frame memory and displayed on the LCD.

Abstract: A video encoder includes a signal processing unit for producing block information such as quantization scale and quantized DCT coefficients and a coding unit for variable-length coding the quantized block information. The amount of generated coded data per unit time (Evop) is estimated from the count (Ncoef(i)) of quantized DCT coefficients contained in block information prior to coding, the amount of coded data (C(y)), and the average codeword length (L(y)) of coded block information. A quantization scale control unit determines the most suitable quantization scale factor on the basis of the target amount of generated coded data (Tvop) and the amount of generated coded data (Evop) and sends it to a quantization unit in the signal processing unit.

Abstract: A picture coding apparatus has a signal processor 10 for generating macro-block information by calculating and quantizing the DCTs of a picture signal of a given unit are calculated for each macro-block MB. This information is input to a syntax generator 12 to generate syntax, which is coded by a variable-length coding processor 13. Quantized DCT coefficients of macro information before coding are counted by a count unit 21, and a code size after coding the macro-block information is counted by a count unit 14. A calculation unit 15 calculates an average code length from the accumulated value of the two code sizes. An estimation unit 14 estimates a generation code size after coding given macro-block information input to the syntax generator 12 on the basis of the average code size.

Abstract: A picture coding apparatus has a signal processor 10 for generating macro-block information by calculating and quantizing the DCTs of a picture signal of a given unit are calculated for each macro-block MB. This information is input to a syntax generator 12 to generate syntax, which is coded by a variable-length coding processor 13. Quantized DCT coefficients of macro information before coding are counted by a count unit 21, and a code size after coding the macro-block information is counted by a count unit 14. A calculation unit 15 calculates an average code length from the accumulated value of the two code sizes. An estimation unit 14 estimates a generation code size after coding given macro-block information input to the syntax generator 12 on the basis of the average code size.

Abstract: In a moving image encoding apparatus of this invention, a generated bit amount extracting section (21) counts generated bits of variable-length-encoded data in units of macroblocks, and a reference generated bit count is set in a parameter value control section (22) as an update condition for a parameter value in each block. The boundary value of the parameter value is set in an intra/inter determination section (23) as a criterion for selection of the intra-encoding mode. In the inter-frame encoding mode, the parameter value control section (22) updates the parameter value of a block in which the generated bit count value of encoded data obtained by the generated bit amount extracting section (21) exceeds a reference value. The intra/inter determination section (23) determines that the influence of a data error is large in a block in which the parameter value is continuously updated and exceeds the boundary value, and switches the current mode to the intra-encoding mode to perform refresh operation.

Abstract: A video encoder includes a signal processing unit for producing block information such as quantization scale and quantized DCT coefficients and a coding unit for variable-length coding the quantized block information. The amount of generated coded data per unit time (Evop) is estimated from the count (Ncoef(i)) of quantized DCT coefficients contained in block information prior to coding, the amount of coded data (C(y)), and the average codeword length (L(y)) of coded block information. A quantization scale control unit determines the most suitable quantization scale factor on the basis of the target amount of generated coded data (Tvop) and the amount of generated coded data (Evop) and sends it to a quantization unit in the signal processing unit.

Abstract: Moving image signal decoder section decodes the moving image bit stream and the time stamp for reproduction transmitted from multiple separator section on a frame by frame basis and stored in input buffer and provides time control section with the time stamp for reproduction that corresponds to the decoded frame and the information on the time stamp in the header of the moving image bit stream, while storing the decoded image data in frame memory. The time control section transmits a request to image output section for outputting image data at the time specified by the time stamp for reproduction as transmitted from the moving image signal decoder section or at the time as determined on the basis of the time stamp of the moving image itself and causes the image data to be read out of the frame memory and displayed on the LCD.

Abstract: A method for decoding time data comprising decoding an encoded bit stream in units of one frame to generate decoded video data and a plurality of decoded header information items for each frame, detecting the time data included in each of the header information items, and determining identical time data which define identical points of time and are detected from at least two of the header information items as frame time data determining the point of time for outputting the decoded frame.

Abstract: A system for applying recipes of semiconductor manufacturing apparatuses includes a plurality of apparatus controllers respectively arranged for semiconductor manufacturing apparatus, a host computer commonly connected to the apparatus controllers to store process recipes, and a group controller which is commonly connected to the apparatus controllers through a channel different from channels which connect the apparatus controllers to the host computer, and is connected to the host computer through a dedicated channel to directly exchange information with the host computer. The host computer sends process recipes to the respective apparatus controllers, writes/reads out a recipe in/from the group controller through the dedicated channel, and reads out a recipe history therefrom through the dedicated channel. The apparatus controllers respectively operate the semiconductor manufacturing apparatuses on the basis of the process recipes sent from the host computer.

Abstract: The bidirectional differential clutch enables to transmit or cutoff both clockwise and counterwise rotation at the input side. The clutch comprises an input gear having a first cylindrical surface, an output gear having a second cylindrical surface disposed with a space to the first cylindrical surface so as to be relatively rotatable, a plurality of engaging members interposed in the space, a holding member inserted into the space, the holding member having a pocket storing the engaging members, the engaging members being for operation from a neutral position in which both cylindrical surfaces are not engaged with each other to an operational position in which both cylindrical surfaces are engaged with each other, a sub-gear producing differential velocity in correspondence to the rotation of the input gear, and the holding member being linked with the sub-gear to slide in a peripheral direction by the differential velocity to operate the engaging members to the operational position.

Abstract: A continuously variable transmission is provided with a driving pulley comprising a stationary half pulley fixed to a driving shaft and a movable half pulley, and a driven pulley comprising a stationary half pulley fixed to a driven shaft and a movable half pulley. A V-groove is formed between the stationary half pulley and the movable half pulley and adjustable by moving the movable half pulley in the axial direction in each of the driving pulley and the driven pulley. An endless belt is wrapped to each V-groove, and rotation of the driving shaft is transmitted to the driven shaft steplessly. A slider gear disposed in the axial direction is connected one or both half pulleys of the driving pulley, and is threadedly engaged with a slider shaft and driven by a driving source and moved forward or rearward in the axial direction on the slider shaft, so that one or both half pulleys are moved forward or rearward in the axial direction and the distance between both half pulleys is adjusted.

Abstract: A Josephson logic integrated circuit packaged on a single substrate, wherein a portion for delivering an output out of the integrated circuit is constructed of an A.C.-driven Josephson logic circuit, and a portion for driving the internal part of the integrated circuit is constructed of a D.C.-driven Josephson logic circuit.

Abstract: A superconducting logic circuit including a first power source terminal connected with a current source; a second power source terminal connected with a current sink; a first superconducting switching device connected between said first power source terminal and ground; a second superconducting switching device connected between said second power source terminal and ground; first and second resistors connected with said first and second power source terminals, respectively; and third and fourth resistors connected with the control terminals of said first and second superconducting switching devices, respectively, wherein the other terminals of said first and second resistors are connected with each other to provide a logic output terminal, and wherein the other terminals of said third and fourth resistors are connected with each other to provide a logic input terminal.

Abstract: A micro-pattern element has a heat discharge pattern formed on a fine line portion of a conductor pattern. Breakage caused by temperature elevation of the conductor pattern in response to the application of an electric current and resulting electromigration can be effectively prevented by the heat-discharge pattern formed on the fine line portion of the conductor pattern; thus, the reliability of the micro-pattern element can be remarkably improved.

Abstract: In a memory device which has a plurality of recirculating type storage loops and in which information of the same addresses of the respective storage loops can be read and written in parallel, a memory device wherein information representing whether or not the corresponding storage loop is a bad or defective loop is written in a specified address of each of the storage loops.