Patents by Inventor Atsushi Denda

Atsushi Denda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20100300514
    Abstract: A solar cell includes a substrate, a lower electrode layer, a semiconductor layer and an upper electrode layer. The lower electrode layer is formed on the substrate with the lower electrode layer having a first lower electrode layer and a second lower electrode layer. The first lower electrode layer includes a material having a lower electrical resistivity than the second lower electrode layer. The semiconductor layer is formed on the lower electrode layer. The upper electrode layer is formed on the semiconductor layer.
    Type: Application
    Filed: May 27, 2010
    Publication date: December 2, 2010
    Applicant: SEIKO EPSON CORPORATION
    Inventors: Atsushi DENDA, Hiromi SAITO
  • Patent number: 7808606
    Abstract: A method for manufacturing a substrate, includes: coating the substrate with a first layer including a first metallic element by a dry deposition technique; coating the first layer with a photo resist layer; forming on the photo resist layer an exposure portion, a pair of non-exposure portions being in contact with the exposure portion and having a substantially parallel stripe-like plan shape, and a half exposure portion that is a part of an inner region of the non-exposure portions and an outer region of the non-exposure portions; removing the exposure portion and an upper portion of the half exposure portion, the upper portion having been exposed; forming an electrode portion and a wiring portion by etching the first layer exposed by removing the exposure portion; exposing the electrode portion and the wiring portion by removing the half exposure portion of which the upper portion has been removed, and forming a pair of banks by the pair of non-exposure portions; applying a treatment solution including a s
    Type: Grant
    Filed: July 2, 2008
    Date of Patent: October 5, 2010
    Assignee: Seiko Epson Corporation
    Inventor: Atsushi Denda
  • Publication number: 20100171718
    Abstract: A method for manufacturing a touch panel including a substrate, a first electrode, and a second electrode, the first and second electrodes being formed on one side of the substrate in a plural numbers and extending in directions intersecting with each other, the method includes forming the first electrode and electrode films on the substrate, forming an insulating film by a printing method on at least an intersection of the first electrode with the second electrode, and forming a bridge wiring line connecting the electrode films over the insulating film by the printing method. In the method, each of the electrode films has a shape obtained by cutting off the second electrode at the intersection.
    Type: Application
    Filed: January 4, 2010
    Publication date: July 8, 2010
    Applicant: SEIKO EPSON CORPORATION
    Inventor: Atsushi DENDA
  • Publication number: 20100117241
    Abstract: A semiconductor device includes: a plurality of semiconductor substrates each having a pad-formed surface and being mutually laminated; a connection electrode pad formed on the pad-formed surface; a wire connecting the connection electrode pads of the plurality of semiconductor substrates so as to electrically connect the semiconductor substrates; a relay electrode pad that is provided on the pad-formed surface of a lower one of the laminated semiconductor substrates so as to be exposed by an upper one of the laminated semiconductor substrates, and that is connected to the connection electrode pad by a relay wire included in the wire; and a mounting electrode pad that is formed on a mounting surface on which the laminated semiconductor substrates are mounted, and that is connected to the relay electrode pad of the lower semiconductor substrate by the wire.
    Type: Application
    Filed: November 10, 2009
    Publication date: May 13, 2010
    Applicant: SEIKO EPSON CORPORATION
    Inventor: Atsushi DENDA
  • Publication number: 20090258490
    Abstract: A method for forming a conductive film, includes: applying a dispersion liquid above a substrate, the dispersion liquid including a plurality of conductive fine-particles made of one conductive material selected from the group consisting of copper, nickel, and an alloy that includes copper or nickel as a main component; and forming the conductive film made from the conductive fine-particles, by heating the dispersion liquid that has been applied above the substrate in an atmosphere including formic acid, by baking the conductive fine-particles so that the conductive fine-particles are mutually fusion bonded.
    Type: Application
    Filed: April 8, 2009
    Publication date: October 15, 2009
    Applicant: SEIKO EPSON CORPORATION
    Inventor: Atsushi DENDA
  • Patent number: 7595137
    Abstract: A method of manufacturing a color filter substrate having a transparent conductive film and colorant material on a substrate includes: forming a bank on the substrate; disposing a liquid material including transparent conductive micro particles in an area defined by the bank; forming the transparent conductive film by baking the transparent conductive micro particles; impregnating gaps among the transparent conductive micro particles in the transparent conductive film with the colorant material, and baking the colorant material.
    Type: Grant
    Filed: August 24, 2006
    Date of Patent: September 29, 2009
    Assignee: Seiko Epson Corporation
    Inventors: Atsushi Denda, Toshimitsu Hirai
  • Patent number: 7517735
    Abstract: A method of manufacturing an active matrix substrate includes forming wiring lines each having a matrix pattern on a substrate such that a wiring line extending in any one of a first direction and a second direction is separated from another wiring line at an intersection; forming a laminated portion composed of an insulating layer and a semiconductor layer on a portion of the wiring line and the intersection; and forming a conductive layer electrically connecting the separated wiring line, and a pixel electrode electrically connected to the wiring line via the semiconductor layer on the laminated portion.
    Type: Grant
    Filed: August 19, 2005
    Date of Patent: April 14, 2009
    Assignee: Future Vision, Inc.
    Inventors: Yoshikazu Yoshimoto, Yoichi Noda, Atsushi Denda, Toshimitsu Hirai, Shinri Sakai
  • Publication number: 20090027605
    Abstract: A method for manufacturing a substrate, includes: coating the substrate with a first layer including a first metallic element by a dry deposition technique; coating the first layer with a photo resist layer; forming on the photo resist layer an exposure portion, a pair of non-exposure portions being in contact with the exposure portion and having a substantially parallel stripe-like plan shape, and a half exposure portion that is a part of an inner region of the non-exposure portions and an outer region of the non-exposure portions; removing the exposure portion and an upper portion of the half exposure portion, the upper portion having been exposed; forming an electrode portion and a wiring portion by etching the first layer exposed by removing the exposure portion; exposing the electrode portion and the wiring portion by removing the half exposure portion of which the upper portion has been removed, and forming a pair of banks by the pair of non-exposure portions; applying a treatment solution including a s
    Type: Application
    Filed: July 2, 2008
    Publication date: January 29, 2009
    Applicant: SEIKO EPSON CORPORATION
    Inventor: Atsushi DENDA
  • Patent number: 7477336
    Abstract: There is provided an active matrix substrate including, on a substrate: lattice-patterned wires, pixel electrodes arranged in an area surrounded with the wires, and switching elements electrically connected to the wires and the pixel electrodes with a conductive film therebetween, wherein an auxiliary conductive portion electrically connecting the pixel electrodes to the conductive film is further provided.
    Type: Grant
    Filed: August 26, 2005
    Date of Patent: January 13, 2009
    Assignee: Seiko Epson Corporation
    Inventors: Yoichi Noda, Shinri Sakai, Atsushi Denda, Toshimitsu Hirai
  • Patent number: 7432137
    Abstract: A method of manufacturing a thin film transistor includes forming a gate electrode on a substrate; forming a gate insulating film on the gate electrode; forming a semiconductor layer on the gate insulating film; forming a bank including a first bank portion and a second bank portion, the first bank portion being located at substantially a central portion of the semiconductor layer, the second bank portion having a thin film portion for surrounding the semiconductor layer and a thick film portion for surrounding the thin film portion at a periphery of the semiconductor layer; arranging first functional liquid containing a conductive material in a region surrounded by the thin film portion and the first bank portion such that the first functional liquid covers the semiconductor layer; drying the first functional liquid to obtain a first conductive film; removing the thin film portion selectively after drying the first functional liquid; arranging second functional liquid including a conductive material on a reg
    Type: Grant
    Filed: August 5, 2005
    Date of Patent: October 7, 2008
    Assignee: Seiko Epson Corporation
    Inventor: Atsushi Denda
  • Publication number: 20070048634
    Abstract: A method of manufacturing a color filter substrate having a transparent conductive film and colorant material on a substrate includes: forming a bank on the substrate; disposing a liquid material including transparent conductive micro particles in an area defined by the bank; forming the transparent conductive film by baking the transparent conductive micro particles; impregnating gaps among the transparent conductive micro particles in the transparent conductive film with the colorant material, and baking the colorant material.
    Type: Application
    Filed: August 24, 2006
    Publication date: March 1, 2007
    Applicant: SEIKO EPSON CORPORATION
    Inventors: Atsushi DENDA, Toshimitsu HIRAI
  • Publication number: 20060268210
    Abstract: A method for forming a pixel electrode on a substrate, including: forming a bank corresponding to a region for forming the pixel electrode on a substrate; disposing, by a liquid ejection method, a first functional liquid containing transparent conductive microparticles in the region partitioned by the bank; drying the first functional liquid to produce a first layer film; disposing, by a liquid ejection method, a second functional liquid containing a silicon compound onto the first layer film; and forming a pixel electrode made of a laminate that includes: a transparent conductive layer which is formed by calcining together the first layer film and the second functional liquid and is composed of the first layer film and silicon oxide filling a pore in the first layer film; and a silicon oxide layer formed on the transparent conductive layer.
    Type: Application
    Filed: May 25, 2006
    Publication date: November 30, 2006
    Applicant: SEIKO EPSON CORPORATION
    Inventor: Atsushi Denda
  • Publication number: 20060236917
    Abstract: A method of forming a conductive film includes disposing liquid material containing particulate materials on a substrate, and baking the liquid material on the substrate through light-irradiation using a flash lamp so as to form a conductive film.
    Type: Application
    Filed: April 19, 2006
    Publication date: October 26, 2006
    Inventor: Atsushi DENDA
  • Publication number: 20060202202
    Abstract: A pixel structure includes pixel electrodes and switching elements which correspond to the pixel electrodes. The pixel electrodes and the switching elements are formed on the same substrate, and each pixel electrode is provided in a layer on the substrate, not on a semiconductor layer of the switching element.
    Type: Application
    Filed: February 28, 2006
    Publication date: September 14, 2006
    Inventors: Atsushi Denda, Yoichi Noda
  • Publication number: 20060079032
    Abstract: A method of manufacturing a thin film transistor includes forming a gate electrode on a substrate; forming a gate insulating film on the gate electrode; forming a semiconductor layer on the gate insulating film; forming a bank including a first bank portion and a second bank portion, the first bank portion being located at substantially a central portion of the semiconductor layer, the second bank portion having a thin film portion for surrounding the semiconductor layer and a thick film portion for surrounding the thin film portion at a periphery of the semiconductor layer; arranging first functional liquid containing a conductive material in a region surrounded by the thin film portion and the first bank portion such that the first functional liquid covers the semiconductor layer; drying the first functional liquid to obtain a first conductive film; removing the thin film portion selectively after drying the first functional liquid; arranging second functional liquid including a conductive material on a reg
    Type: Application
    Filed: August 5, 2005
    Publication date: April 13, 2006
    Applicant: Seiko Epson Corporation
    Inventor: Atsushi Denda
  • Publication number: 20060068091
    Abstract: A method for manufacturing a functional film, including disposing a first ink on a substrate and disposing a second ink on the first ink that has been disposed, the first ink containing at least one of a metal and a metal oxide as a solute, the metal and the metal oxide having a melting point of 900 degrees and above in bulk, upon making the metal and the metal oxide to a particle of having a diameter of from 30 to 150 nm, the particle having a melting point of 255 degrees centigrade and above, and the second ink containing an organic metal salt as a solute.
    Type: Application
    Filed: August 30, 2005
    Publication date: March 30, 2006
    Applicant: SEIKO EPSON CORPORATION
    Inventor: Atsushi Denda
  • Publication number: 20060046359
    Abstract: A method of manufacturing an active matrix substrate includes forming wiring lines each having a matrix pattern on a substrate such that a wiring line extending in any one of a first direction and a second direction is separated from another wiring line at an intersection; forming a laminated portion composed of an insulating layer and a semiconductor layer on a portion of the wiring line and the intersection; and forming a conductive layer electrically connecting the separated wiring line, and a pixel electrode electrically connected to the wiring line via the semiconductor layer on the laminated portion.
    Type: Application
    Filed: August 19, 2005
    Publication date: March 2, 2006
    Applicant: SEIKO EPSON CORPORATION
    Inventors: Yoichi Noda, Atsushi Denda, Toshimitsu Hirai, Shinri Sakai
  • Publication number: 20060044486
    Abstract: There is provided an active matrix substrate including, on a substrate: lattice-patterned wires, pixel electrodes arranged in an area surrounded with the wires, and switching elements electrically connected to the wires and the pixel electrodes with a conductive film therebetween, wherein an auxiliary conductive portion electrically connecting the pixel electrodes to the conductive film is further provided.
    Type: Application
    Filed: August 26, 2005
    Publication date: March 2, 2006
    Inventors: Yoichi Noda, Shinri Sakai, Atsushi Denda, Toshimitsu Hirai
  • Patent number: 6858446
    Abstract: In certain embodiments a plasma is supplied from a plasma chamber 10 into a reaction chamber 18 of a plasma CVD apparatus. An electrode 22 is disposed in the reaction chamber 18. A semiconductor wafer on which a thin film is to be formed is placed on the electrode 22. A radio-frequency wave is generated by a radio-frequency wave generator 28 and supplied to the electrode 22 via a radio-frequency matching network 30, a blocking capacitor 32, and an RF probe 34 so as to control the plasma in the plasma chamber 10. A judgment device 38 is electrically connected to the RF probe 34. The voltage and current are be measured by the RF probe and the judgment device 38 is used to judge the state of the plasma in the plasma chamber 10.
    Type: Grant
    Filed: May 6, 2002
    Date of Patent: February 22, 2005
    Assignee: Seiko Epson Corporation
    Inventors: Atsushi Denda, Yoshinao Ito
  • Publication number: 20020124959
    Abstract: In certain embodiments a plasma is supplied from a plasma chamber 10 into a reaction chamber 18 of a plasma CVD apparatus. An electrode 22 is disposed in the reaction chamber 18. A semiconductor wafer on which a thin film is to be formed is placed on the electrode 22. A radio-frequency wave is generated by a radio-frequency wave generator 28 and supplied to the electrode 22 via a radio-frequency matching network 30, a blocking capacitor 32, and an RF probe 34 so as to control the plasma in the plasma chamber 10. A judgment device 38 is electrically connected to the RF probe 34. The voltage and current are be measured by the RF probe and the judgment device 38 is used to judge the state of the plasma in the plasma chamber 10.
    Type: Application
    Filed: May 6, 2002
    Publication date: September 12, 2002
    Inventors: Atsushi Denda, Yoshinao Ito