Patents by Inventor Atsushi Hirama

Atsushi Hirama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11769438
    Abstract: The present invention includes first to j-th DA conversion circuits that are fixedly coupled to one of a plurality of gradation reference voltage generating circuits steadily generating respective gradation reference voltage groups according to gamma correction characteristics of color components different from one another, and select a gradation reference voltage corresponding to a pixel data piece among the gradation reference voltage group generated by the one of gradation reference voltage generating circuits to output the gradation reference voltage as a gradation voltage, an output unit that assigns the first to j-th gradation voltages to respective first to j-th driving voltage signals in a mode according to an output switching signal, and outputs the first to j-th driving voltage signals to the display panel, and an output control unit that generates the output switching signal to switch modes of assigning the first to j-th gradation voltages to the first to j-th driving voltage signals at every divis
    Type: Grant
    Filed: January 25, 2022
    Date of Patent: September 26, 2023
    Assignee: LAPIS TECHNOLOGY CO., LTD.
    Inventors: Takuro Kotaki, Atsushi Hirama, Hiroshi Tsuchi
  • Publication number: 20220246079
    Abstract: The present invention includes first to j-th DA conversion circuits that are fixedly coupled to one of a plurality of gradation reference voltage generating circuits steadily generating respective gradation reference voltage groups according to gamma correction characteristics of color components different from one another, and select a gradation reference voltage corresponding to a pixel data piece among the gradation reference voltage group generated by the one of gradation reference voltage generating circuits to output the gradation reference voltage as a gradation voltage, an output unit that assigns the first to j-th gradation voltages to respective first to j-th driving voltage signals in a mode according to an output switching signal, and outputs the first to j-th driving voltage signals to the display panel, and an output control unit that generates the output switching signal to switch modes of assigning the first to j-th gradation voltages to the first to j-th driving voltage signals at every divis
    Type: Application
    Filed: January 25, 2022
    Publication date: August 4, 2022
    Applicant: LAPIS Technology Co., Ltd.
    Inventors: Takuro KOTAKI, Atsushi HIRAMA, Hiroshi TSUCHI
  • Patent number: 10818218
    Abstract: A display driver includes gradation voltage generation circuits; n DA converters configured to select and output a gradation voltage corresponding to pixel data, out of the gradation voltages generated by the gradation voltage generation circuit; n amplifiers configured to independently amplify n gradation voltages outputted from the DA converters, to generate n amplified gradation voltages; and a selector configured to output the n amplified gradation voltages from n output terminals, respectively, in a normal mode. In a power save mode, one of the gradation voltage generation circuits generates a gradation voltage, and the other gradation voltage generation circuits stop. In the power save mode, the selector outputs selected one of k amplified gradation voltages from k output terminals, and opens an output terminal of each amplifier, except for an amplifier for generating the one amplified gradation voltage, out of the k amplifiers configured to generate the k amplified gradation voltages.
    Type: Grant
    Filed: November 27, 2018
    Date of Patent: October 27, 2020
    Assignee: LAPIS SEMICONDUCTOR CO., LTD.
    Inventors: Koya Sugihara, Atsushi Hirama
  • Patent number: 10665164
    Abstract: A display driver includes a gamma correction data transmission unit that transmits a plurality of gamma correction data pieces one by one in each predetermined period. A brightness level indicated by a video signal is converted into a gradation voltage with a gamma characteristic based on the gamma correction data piece transmitted from the gamma correction data transmission unit.
    Type: Grant
    Filed: June 9, 2017
    Date of Patent: May 26, 2020
    Assignee: LAPIS SEMICONDUCTOR CO., LTD.
    Inventors: Koji Yamazaki, Atsushi Hirama
  • Patent number: 10621919
    Abstract: A display driver includes a gamma correction data transmission unit that transmits a plurality of gamma correction data pieces one by one in each predetermined period. A brightness level indicated by a video signal is converted into a gradation voltage with a gamma characteristic based on the gamma correction data piece transmitted from the gamma correction data transmission unit.
    Type: Grant
    Filed: November 8, 2017
    Date of Patent: April 14, 2020
    Assignee: LAPIS SEMICONDUCTOR CO., LTD.
    Inventors: Koji Yamazaki, Atsushi Hirama
  • Publication number: 20190164466
    Abstract: A display driver includes gradation voltage generation circuits; n DA converters configured to select and output a gradation voltage corresponding to pixel data, out of the gradation voltages generated by the gradation voltage generation circuit; n amplifiers configured to independently amplify n gradation voltages outputted from the DA converters, to generate n amplified gradation voltages; and a selector configured to output the n amplified gradation voltages from n output terminals, respectively, in a normal mode. In a power save mode, one of the gradation voltage generation circuits generates a gradation voltage, and the other gradation voltage generation circuits stop. In the power save mode, the selector outputs selected one of k amplified gradation voltages from k output terminals, and opens an output terminal of each amplifier, except for an amplifier for generating the one amplified gradation voltage, out of the k amplifiers configured to generate the k amplified gradation voltages.
    Type: Application
    Filed: November 27, 2018
    Publication date: May 30, 2019
    Applicant: LAPIS Semiconductor Co., Ltd.
    Inventors: Koya SUGIHARA, Atsushi HIRAMA
  • Patent number: 10199000
    Abstract: A source driver IC chip, designed to prevent flicker in images displayed on a display panel while suppressing power consumption and heat generation, includes: a reference gradation voltage generating part (220) configured to generate a reference gradation voltage based on a first or second gamma characteristic of the display panel, using first and second power supply voltages (VH) and (VL) inputted through first and second external terminals (PA2, PA3); and a third external terminal (PA4) for externally outputting said reference gradation voltage. The source driver IC chip further includes first and second gradation voltage generating parts configured to generate first and second gradation voltages respectively, using a reference gradation voltage based on a first gamma characteristic inputted through a fourth external terminal and a reference gradation voltage having a second gamma characteristic inputted through a fifth external terminal respectively.
    Type: Grant
    Filed: December 30, 2016
    Date of Patent: February 5, 2019
    Assignee: LAPIS Semiconductor Co., Ltd.
    Inventors: Kenichi Shiibayashi, Koji Higuchi, Atsushi Hirama
  • Publication number: 20180130417
    Abstract: A display driver includes a gamma correction data transmission unit that transmits a plurality of gamma correction data pieces one by one in each predetermined period. A brightness level indicated by a video signal is converted into a gradation voltage with a gamma characteristic based on the gamma correction data piece transmitted from the gamma correction data transmission unit.
    Type: Application
    Filed: November 8, 2017
    Publication date: May 10, 2018
    Applicant: LAPIS Semiconductor Co., Ltd.
    Inventors: Koji YAMAZAKI, Atsushi HIRAMA
  • Publication number: 20170358277
    Abstract: A display driver includes a gamma correction data transmission unit that transmits a plurality of gamma correction data pieces one by one in each predetermined period. A brightness level indicated by a video signal is converted into a gradation voltage with a gamma characteristic based on the gamma correction data piece transmitted from the gamma correction data transmission unit.
    Type: Application
    Filed: June 9, 2017
    Publication date: December 14, 2017
    Applicant: LAPIS Semiconductor Co., Ltd.
    Inventors: Koji YAMAZAKI, Atsushi HIRAMA
  • Patent number: 9799265
    Abstract: A display drive circuit formed in a chip manufactured by a chip on glass implementation, which is connected to lead lines formed on a glass substrate, includes a rectangularly-shaped substrate, a power supply line formed on the substrate, the line being elongated along the longer side of the rectangular shaped substrate, a plurality of output terminals formed on the rectangular shaped substrate, the output terminal being disposed along the power supply line, a plurality of bump electrodes, each of which connects one of the output terminal to one of the lead lines, switches disposed along the power supply line, each of which is connected between the one of the output terminals and the power supply line, a single power supply terminal, which is disposed near the middle of the power supply line, being connected to the power supply line.
    Type: Grant
    Filed: February 3, 2017
    Date of Patent: October 24, 2017
    Assignee: LAPIS SEMICONDUCTOR CO., LTD.
    Inventor: Atsushi Hirama
  • Publication number: 20170148381
    Abstract: A display drive circuit formed in a chip manufactured by a chip on glass implementation, which is connected to lead lines formed on a glass substrate, includes a rectangularly-shaped substrate, a power supply line formed on the substrate, the line being elongated along the longer side of the rectangular shaped substrate, a plurality of output terminals formed on the rectangular shaped substrate, the output terminal being disposed along the power supply line, a plurality of bump electrodes, each of which connects one of the output terminal to one of the lead lines, switches disposed along the power supply line, each of which is connected between the one of the output terminals and the power supply line, a single power supply terminal, which is disposed near the middle of the power supply line, being connected to the power supply line.
    Type: Application
    Filed: February 3, 2017
    Publication date: May 25, 2017
    Applicant: LAPIS Semiconductor Co., Ltd.
    Inventor: Atsushi HIRAMA
  • Publication number: 20170110067
    Abstract: A source driver IC chip, designed to prevent flicker in images displayed on a display panel while suppressing power consumption and heat generation, includes: a reference gradation voltage generating part (220) configured to generate a reference gradation voltage based on a first or second gamma characteristic of the display panel, using first and second power supply voltages (VH) and (VL) inputted through first and second external terminals (PA2, PA3); and a third external terminal (PA4) for externally outputting said reference gradation voltage. The source driver IC chip further includes first and second gradation voltage generating parts configured to generate first and second gradation voltages respectively, using a reference gradation voltage based on a first gamma characteristic inputted through a fourth external terminal and a reference gradation voltage having a second gamma characteristic inputted through a fifth external terminal respectively.
    Type: Application
    Filed: December 30, 2016
    Publication date: April 20, 2017
    Applicant: LAPIS Semiconductor Co., Ltd.
    Inventors: Kenichi SHIIBAYASHI, Koji HIGUCHI, Atsushi HIRAMA
  • Patent number: 9589501
    Abstract: A display drive circuit formed in a chip manufactured by a chip on glass implementation, which is connected to lead lines formed on a glass substrate, includes a rectangularly-shaped substrate, a power supply line formed on the substrate, the line being elongated along the longer side of the rectangular shaped substrate, a plurality of output terminals formed on the rectangular shaped substrate, the output terminal being disposed along the power supply line, a plurality of bump electrodes, each of which connects one of the output terminal to one of the lead lines, switches disposed along the power supply line, each of which is connected between the one of the output terminals and the power supply line, a single power supply terminal, which is disposed near the middle of the power supply line, being connected to the power supply line.
    Type: Grant
    Filed: November 4, 2015
    Date of Patent: March 7, 2017
    Assignee: LAPIS SEMICONDUCTOR CO., LTD.
    Inventor: Atsushi Hirama
  • Patent number: 9570011
    Abstract: A source driver IC chip, designed to prevent flicker in images displayed on a display panel while suppressing power consumption and heat generation, includes: a reference gradation voltage generating part (220) configured to generate a reference gradation voltage based on a first or second gamma characteristic of the display panel, using first and second power supply voltages (VH) and (VL) inputted through first and second external terminals (PA2, PA3); and a third external terminal (PA4) for externally outputting said reference gradation voltage. The source driver IC chip further includes first and second gradation voltage generating parts configured to generate first and second gradation voltages respectively, using a reference gradation voltage based on a first gamma characteristic inputted through a fourth external terminal and a reference gradation voltage having a second gamma characteristic inputted through a fifth external terminal respectively.
    Type: Grant
    Filed: June 27, 2016
    Date of Patent: February 14, 2017
    Assignee: LAPIS Semiconductor Co., Ltd.
    Inventors: Kenichi Shiibayashi, Koji Higuchi, Atsushi Hirama
  • Publication number: 20160307516
    Abstract: A source driver IC chip, designed to prevent flicker in images displayed on a display panel while suppressing power consumption and heat generation, includes: a reference gradation voltage generating part (220) configured to generate a reference gradation voltage based on a first or second gamma characteristic of the display panel, using first and second power supply voltages (VH) and (VL) inputted through first and second external terminals (PA2, PA3); and a third external terminal (PA4) for externally outputting said reference gradation voltage. The source driver IC chip further includes first and second gradation voltage generating parts configured to generate first and second gradation voltages respectively, using a reference gradation voltage based on a first gamma characteristic inputted through a fourth external terminal and a reference gradation voltage having a second gamma characteristic inputted through a fifth external terminal respectively.
    Type: Application
    Filed: June 27, 2016
    Publication date: October 20, 2016
    Applicant: LAPIS Semiconductor Co., Ltd.
    Inventors: Kenichi SHIIBAYASHI, Koji HIGUCHI, Atsushi HIRAMA
  • Patent number: 9406279
    Abstract: A source driver IC chip, designed to prevent flicker in images displayed on a display panel while suppressing power consumption and heat generation, includes: a reference gradation voltage generating part (220) configured to generate a reference gradation voltage based on a first or second gamma characteristic of the display panel, using first and second power supply voltages (VH) and (VL) inputted through first and second external terminals (PA2, PA3); and a third external terminal (PA4) for externally outputting said reference gradation voltage. The source driver IC chip further includes first and second gradation voltage generating parts configured to generate first and second gradation voltages respectively, using a reference gradation voltage based on a first gamma characteristic inputted through a fourth external terminal and a reference gradation voltage having a second gamma characteristic inputted through a fifth external terminal respectively.
    Type: Grant
    Filed: June 18, 2015
    Date of Patent: August 2, 2016
    Assignee: LAPIS Semiconductor Co., Ltd.
    Inventors: Kenichi Shiibayashi, Koji Higuchi, Atsushi Hirama
  • Publication number: 20160055795
    Abstract: A display drive circuit formed in a chip manufactured by a chip on glass implementation, which is connected to lead lines formed on a glass substrate, includes a rectangularly-shaped substrate, a power supply line formed on the substrate, the line being elongated along the longer side of the rectangular shaped substrate, a plurality of output terminals formed on the rectangular shaped substrate, the output terminal being disposed along the power supply line, a plurality of bump electrodes, each of which connects one of the output terminal to one of the lead lines, switches disposed along the power supply line, each of which is connected between the one of the output terminals and the power supply line, a single power supply terminal, which is disposed near the middle of the power supply line, being connected to the power supply line.
    Type: Application
    Filed: November 4, 2015
    Publication date: February 25, 2016
    Applicant: LAPIS SEMICONDUCTOR CO., LTD.
    Inventor: Atsushi HIRAMA
  • Patent number: 9208716
    Abstract: A display drive circuit formed in a chip manufactured by a chip on glass implementation, which is connected to lead lines formed on a glass substrate, includes a rectangularly-shaped substrate, a power supply line formed on the substrate, the line being elongated along the longer side of the rectangular shaped substrate, a plurality of output terminals formed on the rectangular shaped substrate, the output terminal being disposed along the power supply line, a plurality of bump electrodes, each of which connects one of the output terminal to one of the lead lines, switches disposed along the power supply line, each of which is connected between the one of the output terminals and the power supply line, a single power supply terminal, which is disposed near the middle of the power supply line, being connected to the power supply line.
    Type: Grant
    Filed: February 26, 2014
    Date of Patent: December 8, 2015
    Assignee: LAPIS SEMICONDUCTOR CO., LTD.
    Inventor: Atsushi Hirama
  • Patent number: 9202425
    Abstract: A driving circuit includes a pair of operational amplifiers, one producing an analog voltage output of positive polarity, the other producing an analog voltage output of negative polarity. An output switching circuit interchanges these outputs between a pair of data lines. One or both of the operational amplifiers includes a parasitic diode having one terminal connected to the output terminal of the operational amplifier and another terminal normally connected to a power supply voltage of the operational amplifier. When the output of the operational amplifier is switched, a protective switching circuit temporarily disconnects the parasitic diode from the power supply of the operational amplifier and instead connects it to a power supply line carrying a voltage high enough, or low enough, to ensure that the parasitic diode is not forward biased by the existing voltage on the data line to which the output is switched.
    Type: Grant
    Filed: October 14, 2013
    Date of Patent: December 1, 2015
    Assignee: LAPIS SEMICONDUCTOR CO., LTD.
    Inventors: Hideaki Hasegawa, Atsushi Hirama, Koji Higuchi
  • Publication number: 20150287388
    Abstract: A source driver IC chip, designed to prevent flicker in images displayed on a display panel while suppressing power consumption and heat generation, includes: a reference gradation voltage generating part (220) configured to generate a reference gradation voltage based on a first or second gamma characteristic of the display panel, using first and second power supply voltages (VH) and (VL) inputted through first and second external terminals (PA2, PA3); and a third external terminal (PA4) for externally outputting said reference gradation voltage. The source driver IC chip further includes first and second gradation voltage generating parts configured to generate first and second gradation voltages respectively, using a reference gradation voltage based on a first gamma characteristic inputted through a fourth external terminal and a reference gradation voltage having a second gamma characteristic inputted through a fifth external terminal respectively.
    Type: Application
    Filed: June 18, 2015
    Publication date: October 8, 2015
    Applicant: LAPIS Semiconductor Co., Ltd.
    Inventors: Kenichi SHIIBAYASHI, Koji HIGUCHI, Atsushi HIRAMA