Patents by Inventor Atsushi Ishizu

Atsushi Ishizu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240095507
    Abstract: An arithmetic device and an electronic device having small power consumption is provided. An arithmetic device and an electronic device capable of high-speed operation is provided. An arithmetic device and an electronic device capable of suppressing heat generation is provided. The arithmetic device includes a first arithmetic portion and a second arithmetic portion. The first arithmetic portion includes a first CPU core and a second CPU core. The second arithmetic portion includes a first GPU core and a second GPU core. The CPU cores each have a power gating function and each include a first data retention circuit electrically connected to a flip-flop. The first GPU core includes a second data retention circuit capable of retaining an analog value and reading out the analog value as digital data of two or more bits. The second GPU core includes a third data retention circuit capable of retaining a digital value and reading out the digital value as digital data of one bit.
    Type: Application
    Filed: November 16, 2023
    Publication date: March 21, 2024
    Inventors: Takahiko ISHIZU, Takayuki IKEDA, Atsuo ISOBE, Atsushi MIYAGUCHI, Shunpei YAMAZAKI
  • Patent number: 6337715
    Abstract: A broadcasting reception apparatus includes a display unit for presenting a display showing a plurality of channels, with which the user can recognize whether decoding software programs for decoding program signals being currently broadcast via each channel are held in a library buffer, or not, thereby making possible pleasant zapping.
    Type: Grant
    Filed: July 2, 1998
    Date of Patent: January 8, 2002
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Satoru Inagaki, Atsushi Ishizu, Tetsuji Maeda, Shuuhei Taniguchi, Yutaka Nio, Etsuyoshi Sakaguchi, Kenjirou Tsuda
  • Patent number: 6094233
    Abstract: In a noise reducer whose S/N improving amount is variable, as to such a region where image quality deterioration caused by the noise reducer becomes relatively apparent, and both a luminance level and a chroma level are low, the S/N improving amount thereof is decreased. To the contrary, as to such a picture having a dark high frequency range component and a small movement component, no control is made of the S/N improving amount by the above-described luminance level and chroma level, but the normal S/N improvement is sufficiently carried out.
    Type: Grant
    Filed: August 1, 1997
    Date of Patent: July 25, 2000
    Assignee: Matsushita Electric Industrial
    Inventors: Yoichiro Miki, Masanori Hamada, Atsushi Ishizu, Masatoshi Nakano
  • Patent number: 5982449
    Abstract: A television receiver comprising an information extracting circuit for extracting information from a format or content of an input video signal, a video signal processing circuit for processing this video signal by a program or data, a memory for storing the program and data, a CPU for controlling, operating or driving these elements, and a display device for displaying an image. The video signal processing circuit can, under the control of the CPU, decode the signal, correct or set the picture quality such as gradation and sharpness, or adaptively process an on-screen display based on the input video signal. The television receiver is also able to adaptively extend the functions of the television receiver corresponding to various signal formats.
    Type: Grant
    Filed: January 8, 1997
    Date of Patent: November 9, 1999
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Miho Nagai, Takashi Yamaguchi, Yutaka Nio, Hideto Nakahigashi, Hideyo Uwabata, Toshiaki Kitahara, Chikara Gotanda, Atsushi Ishizu
  • Patent number: 5867228
    Abstract: In a noise reducer whose S/N improving amount is variable, as to such a region where image quality deterioration caused by the noise reducer becomes relatively apparent, and both a luminance level and a chroma level are low, the S/N improving amount thereof is decreased. To the contrary, as to such a picture having a dark high frequency range component and a small movement component, no control is made of the S/N improving amount by the above-described luminance level and chroma level, but the normal S/N improvement is sufficiently carried out.
    Type: Grant
    Filed: March 6, 1996
    Date of Patent: February 2, 1999
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Yoichiro Miki, Masanori Hamada, Atsushi Ishizu, Masatoshi Nakano
  • Patent number: 5365274
    Abstract: A video signal conversion apparatus for converting high definition television signals band-width compressed by offset sub-sampling to a conventional standard television signal while removing aliasing interference caused by offset sub-sampling and using less memory capacity than is conventionally required is provided. The image of the sub-sampled signal is restored from the sampling points in the current field by an intra-field interpolation circuit, and the number of scan lines is reduced to the same number in the standard television signal format by a scan line number conversion circuit. Half of the pixels in the current field are then substituted into the signal for the one previous frame for inter-frame interpolation by a signal selector which alternately selects a signal from the scan line number conversion circuit and a signal from field memories, and a time-base operation for removing aliasing interference at the standard television signal rate is executed.
    Type: Grant
    Filed: May 13, 1993
    Date of Patent: November 15, 1994
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Yoshio Seki, Masaki Tokoi, Atsushi Ishizu, Yoichiro Miki
  • Patent number: 5327241
    Abstract: In a video signal processing apparatus for restoring a signal which has been bandwidth-compressed by offset sub-sampling after restoring an image from sample points of a same field of a sub-sampled signal, a first adder performs an inter-field averaging process from inter-field signals before or after three adjacent fields. A second adder performs an inter-frame averaging process from inter-frame signals. One field difference and one frame difference are detected from the three adjacent inter-field signals thereby switching an output signal of the first adder and an output signal of the second adder in accordance with the magnitudes of the differences thus detected. In this way, aliasing interferences accompanied with bandwidth compression can be detected. By selecting an optimum eliminating filter, aliasing interference due to interfield sub-sampling and aliasing interference due to inter-frame sub-sampling can be eliminated.
    Type: Grant
    Filed: July 20, 1992
    Date of Patent: July 5, 1994
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Atsushi Ishizu, Masaki Tokoi, Yoshio Seki
  • Patent number: 5311297
    Abstract: A television signal converting apparatus receives a high definition television signal which is processed approximately linearly on the transmission and receiving sides and whose transmission only is processed non-linearly. A non-linear level correction circuit is provided, which collectively simultaneously carries out two kinds of non-linear processes, namely, a transmission inverse gamma correction and a CRT gamma correction, which are executed on the transmission side, thus precisely reproducing the signal level of a luminance signal by using a small-scale circuit.
    Type: Grant
    Filed: June 3, 1991
    Date of Patent: May 10, 1994
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Yoshio Seki, Atsushi Ishizu, Masaki Tokoi
  • Patent number: 5225898
    Abstract: A noise reduction apparatus for use in a television receiver or VCR using the NTSC format, in which a video signal or a demodulated color difference signal is processed by an operational circuit which supplies a noise-reduced output signal to a first one of two series-connected one-frame delay elements and which compares the input video signal with an output signal from the first 1-frame delay element, to execute noise reduction. A degree of noise reduction executed by the operational circuit is controlled in accordance with the degree of correlation between the output signal from the second 1-frame delay element and the input video signal, such that the degree of noise reduction is made small or zero when the correlation is below a predetermined level, indicating the presence of motion components in the video signal.
    Type: Grant
    Filed: April 22, 1991
    Date of Patent: July 6, 1993
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Kiyoshi Imai, Masaaki Fujita, Atsushi Ishizu
  • Patent number: 5168358
    Abstract: A video signal converting apparatus includes: an interpolating circuit for interpolating a non-sampling point from sampling points in a field for restoring an HDTV band-compressed by offset sub-sampling; a first delay element for delaying the interpolated signal by one field period and a second delay element for delaying an output of the first delay element by one field; a median-value selector for selecting a median-value signal from signals in three adjacent fields from the input and output of the two delay elements, and an adder for averaging the output of the first delay element and an output of the median-value selector. Alternatively, the first and second delay elements maybe disposed before the interpolating circuit rather than after the interpolating circuit. Furthermore, a time-access conversion circuit maybe disposed either before the interpolating circuit or after the adder.
    Type: Grant
    Filed: June 7, 1991
    Date of Patent: December 1, 1992
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Atsushi Ishizu, Yoshio Seki, Masaki Tokoi
  • Patent number: 5155582
    Abstract: A dot crawling interference elimination device and a color subcarrier vertical correlation detection device, which comprise a color subcarrier vertical correlation detection device for a video signal, an adaptive three-dimensional Y/C separation unit, and an adaptive notch filter of a color signal band, detect vertical correlation of a color subcarrier in a non-standard signal, such as a signal reproduced from a home VCRs or a special signal reproduced from an optical VDP system, that does not strictly meet the standards of the NTSC system or the PAL system, thereby to discriminate non-standard characteristics of the signal, and eliminate a color signal component, which mixes into a luminance signal when a motion-adaptive Y/C separation is carried out for the non-standard signal, by using an adaptive notch filter that suits a non-standard state of the input image signal.
    Type: Grant
    Filed: July 30, 1990
    Date of Patent: October 13, 1992
    Assignee: Matsushita Electric Industrial Co. Ltd.
    Inventors: Masaki Tokoi, Atsushi Ishizu, Kiyoshi Imai
  • Patent number: 5146317
    Abstract: In the NTSC color television system, a signal having a medium level in the three signals of the bands the color sub-carrier frequency of neighboring three scanning lines is substracted from the signal of the central scanning line of the three scanning lines, the resultant signal is a luminance signal containing no cross luminance, even if the composite video signal in the three scanning lines does not maintain vertical correlation.
    Type: Grant
    Filed: August 3, 1990
    Date of Patent: September 8, 1992
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Atsushi Ishizu, Kenta Sokawa, Kiyoshi Imai
  • Patent number: 5111297
    Abstract: A double-scanning non-interlaced television receiver performs scanning line interpolation by using a memory to reproduce a 1/60 second frame with 525 scanning lines. The receiver has a picture-in-picture (P-in-P) function which inserts a frame (sub-picture) into a part of another frame (main picture). The receiver is provided with a signal processing circuit for implementing the scanning line interpolation and a memory having a frame-wide capacity for producing a sub-picture. The receiver (1) produces a video signal for the main scanning line and a video signal for the interpolated scanning line for the main picture and a video signal for the main scanning line and a video signal for the interpellated scanning line for the sub-picture and (2) performs a double-scanning conversion, thereby providing a sub-picture without causing line flicker.
    Type: Grant
    Filed: July 31, 1990
    Date of Patent: May 5, 1992
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Toshiaki Tsuji, Kiyoshi Imai, Atsushi Ishizu
  • Patent number: 5095354
    Abstract: A device detects a correlation between frames represented by a video signal of an interlaced scanning format. A sudden motion of an object represented by the video signal is detected on the basis of the detected correlation. A normal motion of the object represented by the video signal is detected on the basis of the detected correlation. Scanning lines represented by the video signl are interpolated with changeable interpolation characteristics. The interpolation characteristics are changed in response to the detected normal motion of the object. The interpolation characteristics are changed in response to the detected sudden motion of the object.
    Type: Grant
    Filed: August 10, 1990
    Date of Patent: March 10, 1992
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Kenta Sokawa, Atsushi Ishizu, Kiyoshi Imai