Patents by Inventor Atsushi Kasahara

Atsushi Kasahara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11476187
    Abstract: On a substrate, a wiring layer is arranged by sequentially stacking a first insulation film, a lower electrode, a second insulation film, an intermediate electrode, a third insulation film, and an upper electrode in this order. A capacitor includes a first capacitor having the lower electrode and the intermediate electrode, and a second capacitor having the intermediate electrode and the upper electrode. The first capacitor and the second capacitor are connected in parallel to each other by electrically connecting the lower electrode and the upper electrode. Further, the intermediate electrode has a higher potential than the lower layer electrode and the upper electrode.
    Type: Grant
    Filed: October 30, 2020
    Date of Patent: October 18, 2022
    Assignee: DENSO CORPORATION
    Inventors: Shin Takizawa, Seiji Noma, Yusuke Nonaka, Shinichirou Yanagi, Atsushi Kasahara, Shogo Ikeura
  • Patent number: 11322584
    Abstract: A semiconductor device includes a semiconductor substrate, an upper diffusion region and a lower diffusion region. The semiconductor substrate has a main surface. The upper diffusion region of a first conductivity type is disposed close to the main surface of the semiconductor device. The lower diffusion region of a second conductivity type is disposed up to a position deeper than the upper diffusion region in a depth direction of the semiconductor substrate from the main surface as a reference, and has a higher impurity concentration than the semiconductor substrate. A diode device is provided by having a PN junction surface at an interface between the upper diffusion region and the lower diffusion region, and the PN junction surface has a curved surface disposed at a portion opposite to the main surface.
    Type: Grant
    Filed: October 9, 2020
    Date of Patent: May 3, 2022
    Assignee: DENSO CORPORATION
    Inventors: Shin Takizawa, Yusuke Nonaka, Shinichirou Yanagi, Atsushi Kasahara, Shogo Ikeura
  • Patent number: 11114571
    Abstract: A semiconductor device includes: a semiconductor substrate having a diode formation region; an upper diffusion region of a first conductivity type provided on a surface layer of a main surface of the semiconductor substrate in the diode formation region; and a lower diffusion region of a second conductivity type provided at a position deeper than the upper diffusion region with respect to the main surface in a depth direction of the semiconductor substrate, the lower diffusion region having a higher impurity concentration as compared to the semiconductor substrate. The lower diffusion region provides a PN joint surface with the upper diffusion region at a position deeper than the main surface, and has a maximum point indicating a maximum concentration in an impurity concentration profile of the lower diffusion region in the diode formation region.
    Type: Grant
    Filed: March 28, 2019
    Date of Patent: September 7, 2021
    Assignee: DENSO CORPORATION
    Inventors: Shinichirou Yanagi, Yusuke Nonaka, Seiji Noma, Shinya Sakurai, Shogo Ikeura, Atsushi Kasahara, Shin Takizawa
  • Publication number: 20210074631
    Abstract: On a substrate, a wiring layer is arranged by sequentially stacking a first insulation film, a lower electrode, a second insulation film, an intermediate electrode, a third insulation film, and an upper electrode in this order. A capacitor includes a first capacitor having the lower electrode and the intermediate electrode, and a second capacitor having the intermediate electrode and the upper electrode. The first capacitor and the second capacitor are connected in parallel to each other by electrically connecting the lower electrode and the upper electrode. Further, the intermediate electrode has a higher potential than the lower layer electrode and the upper electrode.
    Type: Application
    Filed: October 30, 2020
    Publication date: March 11, 2021
    Inventors: Shin TAKIZAWA, Seiji NOMA, Yusuke NONAKA, Shinichirou YANAGI, Atsushi KASAHARA, Shogo IKEURA
  • Publication number: 20210028277
    Abstract: A semiconductor device includes a semiconductor substrate, an upper diffusion region and a lower diffusion region. The semiconductor substrate has a main surface. The upper diffusion region of a first conductivity type is disposed close to the main surface of the semiconductor device. The lower diffusion region of a second conductivity type is disposed up to a position deeper than the upper diffusion region in a depth direction of the semiconductor substrate from the main surface as a reference, and has a higher impurity concentration than the semiconductor substrate. A diode device is provided by having a PN junction surface at an interface between the upper diffusion region and the lower diffusion region, and the PN junction surface has a curved surface disposed at a portion opposite to the main surface.
    Type: Application
    Filed: October 9, 2020
    Publication date: January 28, 2021
    Inventors: Shin TAKIZAWA, Yusuke NONAKA, Shinichirou YANAGI, Atsushi KASAHARA, Shogo IKEURA
  • Publication number: 20190229219
    Abstract: A semiconductor device includes: a semiconductor substrate having a diode formation region; an upper diffusion region of a first conductivity type provided on a surface layer of a main surface of the semiconductor substrate in the diode formation region; and a lower diffusion region of a second conductivity type provided at a position deeper than the upper diffusion region with respect to the main surface in a depth direction of the semiconductor substrate, the lower diffusion region having a higher impurity concentration as compared to the semiconductor substrate. The lower diffusion region provides a PN joint surface with the upper diffusion region at a position deeper than the main surface, and has a maximum point indicating a maximum concentration in an impurity concentration profile of the lower diffusion region in the diode formation region.
    Type: Application
    Filed: March 28, 2019
    Publication date: July 25, 2019
    Inventors: Shinichirou YANAGI, Yusuke NONAKA, Seiji NOMA, Shinya SAKURAI, Shogo IKEURA, Atsushi KASAHARA, Shin TAKIZAWA
  • Patent number: 9741846
    Abstract: A semiconductor device includes a lateral transistor having: a semiconductor substrate including a drift layer; a first impurity layer in the drift layer; a channel layer in the drift layer; a second impurity layer in the channel layer; a separation insulation film on the drift layer between the channel layer and the first impurity layer; a gate insulation film on a channel region between the second impurity layer and the drift layer connected with the separation insulation film; a gate electrode on the gate insulation film and the separation insulation film; a first electrode connected with the first impurity layer; a second electrode connected with the second impurity layer and the channel layer; and a field plate on the separation insulation film between the gate electrode and the first electrode and connected with the first electrode. The field plate is larger than the gate electrode in a current direction.
    Type: Grant
    Filed: December 17, 2014
    Date of Patent: August 22, 2017
    Assignee: DENSO CORPORATION
    Inventors: Hiroshi Kameoka, Shigeki Takahashi, Akira Yamada, Atsushi Kasahara
  • Publication number: 20160351708
    Abstract: A semiconductor device includes a lateral transistor having: a semiconductor substrate including a drift layer; a first impurity layer in the drift layer; a channel layer in the drift layer; a second impurity layer in the channel layer; a separation insulation film on the drift layer between the channel layer and the first impurity layer; a gate insulation film on a channel region between the second impurity layer and the drift layer connected with the separation insulation film; a gate electrode on the gate insulation film and the separation insulation film; a first electrode connected with the first impurity layer; a second electrode connected with the second impurity layer and the channel layer; and a field plate on the separation insulation film between the gate electrode and the first electrode and connected with the first electrode. The field plate is larger than the gate electrode in a current direction.
    Type: Application
    Filed: December 17, 2014
    Publication date: December 1, 2016
    Inventors: Hiroshi KAMEOKA, Shigeki TAKAHASHI, Akira YAMADA, Atsushi KASAHARA
  • Publication number: 20100316445
    Abstract: Problem to be Solved The present invention provides a method for continuous on-site repaving of an asphalt mixture layer of a road pavement and a motor-driven vehicle system therefor, while moving the motor-driven vehicle system.
    Type: Application
    Filed: November 12, 2008
    Publication date: December 16, 2010
    Applicants: Green Arm Co., Ltd., Sumitomo Construction Machinery Sales Co., Ltd., Hitachi Construction Machinery Co., Ltd.
    Inventors: Atsushi Kasahara, Fumio Goto, Atsuki Gomi, Takashi Okuno, Takeshi Kunishima, Hoeyum Yoon
  • Patent number: 7448825
    Abstract: A method for recycling in place an asphalt mixture layer of a paved road continuously, while moving a self-propelled vehicle system, which comprises a step of heating and softening the asphalt mixture layer, a step of scraping and breaking said hot and softened asphalt mixture layer and keeping the softened mixture at a temperature sufficient not to form an aggregate, to prepare an asphalt mixture having a single-grained structure, a sieving step of classifying said asphalt mixture having a single-grained structure into a plurality of grain size groups, a step of designing mix proportions for converting said asphalt mixture to a recycled asphalt mixture by the use of said plurality of grain size groups classified, a step of mixing uniformly said recycled asphalt mixtures having designed mix proportions, and a step of spreading and compacting said recycled asphalt mixtures having been mixed uniformly, to thereby form a recycled asphalt mixtures layer.
    Type: Grant
    Filed: January 26, 2007
    Date of Patent: November 11, 2008
    Assignees: Green Arm Co., Ltd., Hitachi Construction Machinery Co., Ltd.
    Inventors: Atsushi Kasahara, Shunsuke Ushio, Kojiro Ogata, Hiroshi Inamitsu, Fumio Goto, Tomoyuki Abe, Hiroaki Irie, Isami Fujii, Kazuo Onoda, Hideo Ikeda, Eisuke Nagai, Atsuki Gomi, Masaki Tsunabuchi
  • Publication number: 20070122235
    Abstract: A method for recycling in place an asphalt mixture layer of a paved road continuously, while moving a self-propelled vehicle system, which comprises a step of heating and softening the asphalt mixture layer, a step of scraping and breaking said hot and softened asphalt mixture layer and keeping the softened mixture at a temperature sufficient not to form an aggregate, to prepare an asphalt mixture having a single-grained structure, a sieving step of classifying said asphalt mixture having a single-grained structure into a plurality of grain size groups, a step of designing mix proportions for converting said asphalt mixture to a recycled asphalt mixture by the use of said plurality of grain size groups classified, a step of mixing uniformly said recycled asphalt mixtures having designed mix proportions, and a step of spreading and compacting said recycled asphalt mixtures having been mixed uniformly, to thereby form a recycled asphalt mixtures layer.
    Type: Application
    Filed: January 26, 2007
    Publication date: May 31, 2007
    Applicants: Green Arm Co., Ltd., Hitachi Construction Machinery Co., Ltd.
    Inventors: Atsushi Kasahara, Shunsuke Ushio, Kojiro Ogata, Hiroshi Inamitsu, Fumio Goto, Tomoyuki Abe, Hiroaki Irie, Isami Fujii, Kazuo Onoda, Hideo Ikeda, Eisuke Nagai, Atsuki Gomi, Masaki Tsunabuchi
  • Patent number: 6679106
    Abstract: The object of the present invention is to provide a road surface roughness measuring apparatus for measuring the coefficient of dynamic friction and the roughness of the road surface in each direction at a same section where the coefficient of dynamic friction is measured, said apparatus divides the measuring circle on the road surface into a plurality of sections, on which measuring circle the rotary type unit for measuring the coefficient of dynamic friction measures the coefficient of dynamic friction.
    Type: Grant
    Filed: March 18, 2002
    Date of Patent: January 20, 2004
    Assignee: Nippo Sangyo Co., Ltd.
    Inventors: Hironari Abe, Toshio Sawa, Atsushi Kasahara