Patents by Inventor Atsushi Komai

Atsushi Komai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8174088
    Abstract: Storage capacitors Ctd and Cts are provided alternately side by side sequentially in a row direction. Each of the storage capacitors Ctd and Cts has an electrode layer 21 constituting a signal electrode and an upper side electrode layer 23 and a lower side electrode layer 28 constituting a fixed potential electrode. The signal electrodes of the respective storage capacitors Ctd and Cts are electrically independent of each other. The fixed potential electrodes of the respective storage capacitors Ctd and Cts are electrically connected to each other and connected to the ground etc. Contact holes 26a and 26b that connect the electrode layers 23 and 28 are provided between the electrode layers 21 of the neighboring storage capacitors Ctd and Cts so as to occupy 52% or more of the opposed area of the second electrode sections of two neighboring storage capacitors.
    Type: Grant
    Filed: February 19, 2010
    Date of Patent: May 8, 2012
    Assignee: Nikon Corporation
    Inventor: Atsushi Komai
  • Publication number: 20100148296
    Abstract: Storage capacitors Ctd and Cts are provided alternately side by side sequentially in a row direction. Each of the storage capacitors Ctd and Cts has an electrode layer 21 constituting a signal electrode and an upper side electrode layer 23 and a lower side electrode layer 28 constituting a fixed potential electrode. The signal electrodes of the respective storage capacitors Ctd and Cts are electrically independent of each other. The fixed potential electrodes of the respective storage capacitors Ctd and Cts are electrically connected to each other and connected to the ground etc. Contact holes 26a and 26b that connect the electrode layers 23 and 28 are provided between the electrode layers 21 of the neighboring storage capacitors Ctd and Cts so as to occupy 52% or more of the opposed area of the second electrode sections of two neighboring storage capacitors.
    Type: Application
    Filed: February 19, 2010
    Publication date: June 17, 2010
    Applicant: NIKON CORPORATION
    Inventor: Atsushi KOMAI
  • Patent number: 7427877
    Abstract: A level shift circuit that shifts both the high potential level and the low potential level of an input voltage, a micro actuator and an optical switch using such a level shift circuit are disclosed. A CMOS inverter 11 connected to a +5 V power source and a 0 V power source provides, in response to an input signal, an output voltage whose H level is +5 V and whose L level is 0 V. A single channel MOS inverter 12 connected to a +15 V power source and the 0 V power source provides, in response to the output voltage of the CMOS inverter 11, an output voltage whose H level is +15 V and whose L level is 0 V. A single channel MOS inverter 13 connected to the +15 V power source and a ?15 V power source provides an output voltage whose H level is +15 V and whose L level is ?15 V. The inverter 12 has an NMOS transistor Q4 as a drive element. The inverter 13 has a PMOS transistor Q5 of the opposite conduction type as a drive element.
    Type: Grant
    Filed: June 8, 2006
    Date of Patent: September 23, 2008
    Assignee: Nikon Corporation
    Inventor: Atsushi Komai
  • Publication number: 20060226876
    Abstract: A level shift circuit that shifts both the high potential level and the low potential level of an input voltage, a micro actuator and an optical switch using such a level shift circuit are disclosed. A CMOS inverter 11 connected to a +5 V power source and a 0 V power source provides, in response to an input signal, an output voltage whose H level is +5 V and whose L level is 0 V. A single channel MOS inverter 12 connected to a +15 V power source and the 0 V power source provides, in response to the output voltage of the CMOS inverter 11, an output voltage whose H level is +15 V and whose L level is 0 V. A single channel MOS inverter 13 connected to the +15 V power source and a ?15 V power source provides an output voltage whose H level is +15 V and whose L level is ?15 V. The inverter 12 has an NMOS transistor Q4 as a drive element. The inverter 13 has a PMOS transistor Q5 of the opposite conduction type as a drive element.
    Type: Application
    Filed: June 8, 2006
    Publication date: October 12, 2006
    Inventor: Atsushi Komai
  • Patent number: 5804827
    Abstract: An infrared ray detection device of this invention includes (i) a silicon substrate, (ii) a plurality of light-receiving portions which are disposed at predetermined intervals on one surface of the silicon substrate, and receive infrared rays, (iii) a plurality of reading portions which are disposed on the one surface of the silicon substrate at positions adjacent to the plurality of light-receiving portions, and read outputs from the plurality of light-receiving portions, and (iv) an impurity-doped silicon layer which are disposed in contact with the other surface of the silicon substrate and contains a donor or acceptor impurity at a concentration high enough to absorb infrared rays passing through the silicon substrate.
    Type: Grant
    Filed: October 25, 1996
    Date of Patent: September 8, 1998
    Assignee: Nikon Corporation
    Inventors: Keiichi Akagawa, Atsushi Komai
  • Patent number: 4696760
    Abstract: A method for the production of an aqueous dispersion of a water insoluble N-substituted N',N'-alkylene urea having the general formula I: ##STR1## wherein R.sup.1 denotes alkyl having 6 to 20 carbon atoms, phenyl or ##STR2## in case of m=1, or R.sup.1 denotes alkylene having 6 to 20 carbon atoms, phenylene or ##STR3## in case of m=2, where X denotes H, CH.sub.3 or OCH.sub.3 and n is 0 or 1, R.sup.2 denotes H or CH.sub.3, R.sup.3 denotes H, CH.sub.3 or C.sub.2 H.sub.5 and R.sup.4 denotes H or CH.sub.3, by the reaction of an alkylene imine having 2 to 4 carbon atoms with an isocyanate represented by the general formula II:R-NCO (II)wherein R denotes an alkyl having 6 to 20 carbon atoms, ##STR4## wherein X and n are the same as above in the presence of at least one surface active agent selected from the group consisting of anionic surface active agents and nonionic surface active agents under vigorous stirring.
    Type: Grant
    Filed: December 5, 1984
    Date of Patent: September 29, 1987
    Assignee: Nippon Shokubai Kagaku Kogyo Co., Ltd.
    Inventors: Yutaka Morimoto, Minoru Saotome, Atsushi Komai
  • Patent number: 4108863
    Abstract: Copper phthalocyanine of a novel crystal form which by measurement using CuK.alpha. radiation of .lambda. = 1.5418 A.U. shows an X-ray diffraction pattern having peaks at Bragg's angles 2.theta. equal to about 8.6.degree., 17.2.degree., 18.3.degree., 23.2.degree., 25.3.degree., 26.5.degree., and 28.8.degree..
    Type: Grant
    Filed: December 27, 1976
    Date of Patent: August 22, 1978
    Assignee: Nippon Shokubai Kagaku Kogyo Co. Ltd.
    Inventors: Atsushi Komai, Naoyuki Shirane, Yuji Ito, Sadao Terui, Michikazu Ninomiya