Patents by Inventor Atsushi Maekawa

Atsushi Maekawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10871115
    Abstract: When atmospheric pressure (Pa) which varies according to altitude is higher than a predetermined pressure threshold (Path) during idle operation in which catalyst warm-up request is issued, an intake pressure is controlled, through a throttle valve (19), to an intake pressure at which an intake air amount required to promote the warm-up of a catalyst converter (26) is obtained. When the atmospheric pressure (Pa) is lower than the predetermined pressure threshold (Path), the intake pressure is controlled, through a throttle valve (19), to an intake pressure (Pa?Pb) at which a differential pressure (Pb) required by a brake booster (8) is obtained. Accordingly, negative pressure in the brake booster (8) can be secured while promoting the warm-up of the catalyst during the idle operation.
    Type: Grant
    Filed: July 19, 2017
    Date of Patent: December 22, 2020
    Assignee: NISSAN MOTOR CO., LTD.
    Inventors: Atsushi Maekawa, Kenji Suzuki, Kentaro Yamano, Takeshi Miyamoto, Tomoki Itou, Taichi Andou, Toshio Hashimoto, Akio Ashikaga
  • Publication number: 20200208584
    Abstract: When atmospheric pressure (Pa) which varies according to altitude is higher than a predetermined pressure threshold (Path) during idle operation in which catalyst warm-up request is issued, an intake pressure is controlled, through a throttle valve (19), to an intake pressure at which an intake air amount required to promote the warm-up of a catalyst converter (26) is obtained. When the atmospheric pressure (Pa) is lower than the predetermined pressure threshold (Path), the intake pressure is controlled, through a throttle valve (19), to an intake pressure (Pa?Pb) at which a differential pressure (Pb) required by a brake booster (8) is obtained. Accordingly, negative pressure in the brake booster (8) can be secured while promoting the warm-up of the catalyst during the idle operation.
    Type: Application
    Filed: July 19, 2017
    Publication date: July 2, 2020
    Applicant: NISSAN MOTOR CO., LTD.
    Inventors: Atsushi MAEKAWA, Kenji SUZUKI, Kentaro YAMANO, Takeshi MIYAMOTO, Tomoki ITOU, Taichi ANDOU, Toshio HASHIMOTO, Akio ASHIKAGA
  • Patent number: 9324573
    Abstract: One method includes sequentially forming an insulating film and a first material film on a semiconductor substrate, forming on the first material film a mask film having a rectangular first opening, and dry-etching the first material film using the mask film as a mask to form an ellipsoidal second opening having its shorter side aligned in a first direction of the first material film. Forming the mask film includes forming a second material film having a side surface that faces the first direction of the first opening, and a third material film having side surfaces facing a second direction of the first opening, and the thickness of the third material film is greater than the thickness of the second material film.
    Type: Grant
    Filed: January 17, 2014
    Date of Patent: April 26, 2016
    Assignee: PS5 Luxco S.a.r.l.
    Inventor: Atsushi Maekawa
  • Publication number: 20150325454
    Abstract: One method includes sequentially forming an insulating film and a first material film on a semiconductor substrate, forming on the first material film a mask film having a rectangular first opening, and dry-etching the first material film using the mask film as a mask to form an ellipsoidal second opening having its shorter side aligned in a first direction of the first material film. Forming the mask film includes forming a second material film having a side surface that faces the first direction of the first opening, and a third material film having side surfaces facing a second direction of the first opening, and the thickness of the third material film is greater than the thickness of the second material film.
    Type: Application
    Filed: January 17, 2014
    Publication date: November 12, 2015
    Inventor: Atsushi MAEKAWA
  • Patent number: 8699844
    Abstract: A content distribution apparatus includes a receiving section, a correction section, an evaluation section and a summary generation section. The receiving section receives plural pieces of watching information of target content information and stores the received watching information. Each of the watching information includes information indicating a reproduction start position from which it was started to reproduce the target content information. The correction section corrects each of the reproduction start positions to any of a plurality of predetermined positions. The evaluation section generates evaluation information of each corrected reproduction start position based on the corrected reproduction start position and the stored watching information. The summary generation section extracts a part of the target content information based on the generated evaluation information of the respective corrected reproduction start positions to generate summary information of the target content information.
    Type: Grant
    Filed: November 16, 2006
    Date of Patent: April 15, 2014
    Assignee: Fuji Xerox Co., Ltd.
    Inventor: Atsushi Maekawa
  • Publication number: 20130067900
    Abstract: A power generating apparatus includes a rotating shaft, a hydraulic pump driven by the rotating shaft, a hydraulic motor driven by pressurized oil supplied from the hydraulic pump, and a generator coupled to the hydraulic motor. Each of the hydraulic pump and motor includes working chambers each defined by a cylinder and a piston, a high pressure manifold and a low pressure manifold. Each of the high and low pressure manifolds includes branch channels connected to the working chambers and a merging channel connected to a high or low pressure oil line. The branch channels are equipped with high or low pressures valves, joined together and merged into the merging channel.
    Type: Application
    Filed: May 30, 2011
    Publication date: March 21, 2013
    Applicant: MITSUBISHI HEAVY INDUSTRIES, LTD.
    Inventors: Kazuhisa Tsutsumi, Masayuki Shimizu, Atsushi Maekawa, Toshihide Noguchi, Yasuhiro Korematsu, Niall Caldwell, Daniil Dumnov, Stephen Salter, Uwe Stein, William Rampen, Robert Fox, Alasdair Robertson, Stephen Laird, Hauke Karstens, Venkata Pappala
  • Patent number: 8399930
    Abstract: There is provided a semiconductor device that includes: a transistor having a gate electrode, a source region, and a drain region; a first inter-layer insulation film covering the transistor; a first contact plug formed penetrating through the first inter-layer insulation film and connected to either the source region or the drain region; a second inter-layer insulation film covering the first contact plug; a groove extending in the second inter-layer insulation film in a same direction as an extending direction of the gate electrode and exposing a top surface of the first contact plug at a bottom thereof; a second contact plug connected to the first contact plug and formed in the groove; and a wiring pattern extending on the second inter-layer insulation film so as to traverse the groove and integrated with the second contact plug.
    Type: Grant
    Filed: January 30, 2012
    Date of Patent: March 19, 2013
    Assignee: Elpida Memory, Inc.
    Inventor: Atsushi Maekawa
  • Patent number: 8358024
    Abstract: An object of the present invention is to provide a wind turbine generator and a tidal current generator equipped with a hydraulic transmission with a combination of a hydraulic pump and a hydraulic motor and which has a superior productivity and maintainability. The wind turbine generator 1 has the hydraulic transmission 10 for transmitting the rotation energy of a main shaft 8 to a generator 20. The hydraulic transmission 10 includes a hydraulic pump 12 of variable displacement type which is driven by the main shaft 8, a hydraulic motor 14 of variable displacement type which is connected to the generator 20, and a high pressure oil line and a low pressure oil line which are arranged between the hydraulic pump 12 and the hydraulic motor 14. The hydraulic transmission 10 is at least partially constituted of a plurality of modules (M1 to M7).
    Type: Grant
    Filed: November 30, 2010
    Date of Patent: January 22, 2013
    Assignee: Mitsubishi Heavy Industries, Ltd.
    Inventors: Kazuhisa Tsutsumi, Atsushi Maekawa, Masayuki Shimizu, Stephen Salter, Uwe Stein, William Rampen, Robert Fox, Hauke Karstens
  • Publication number: 20120129339
    Abstract: There is provided a semiconductor device that includes: a transistor having a gate electrode, a source region, and a drain region; a first inter-layer insulation film covering the transistor; a first contact plug formed penetrating through the first inter-layer insulation film and connected to either the source region or the drain region; a second inter-layer insulation film covering the first contact plug; a groove extending in the second inter-layer insulation film in a same direction as an extending direction of the gate electrode and exposing a top surface of the first contact plug at a bottom thereof; a second contact plug connected to the first contact plug and formed in the groove; and a wiring pattern extending on the second inter-layer insulation film so as to traverse the groove and integrated with the second contact plug.
    Type: Application
    Filed: January 30, 2012
    Publication date: May 24, 2012
    Applicant: ELPIDA MEMORY, INC.
    Inventor: ATSUSHI MAEKAWA
  • Publication number: 20120061969
    Abstract: An object of the present invention is to provide a wind turbine generator and a tidal current generator equipped with a hydraulic transmission with a combination of a hydraulic pump and a hydraulic motor and which has a superior productivity and maintainability. The wind turbine generator 1 has the hydraulic transmission 10 for transmitting the rotation energy of a main shaft 8 to a generator 20. The hydraulic transmission 10 includes a hydraulic pump 12 of variable displacement type which is driven by the main shaft 8, a hydraulic motor 14 of variable displacement type which is connected to the generator 20, and a high pressure oil line and a low pressure oil line which are arranged between the hydraulic pump 12 and the hydraulic motor 14. The hydraulic transmission 10 is at least partially constituted of a plurality of modules (M1 to M7).
    Type: Application
    Filed: November 30, 2010
    Publication date: March 15, 2012
    Applicant: MITSUBISHI HEAVY INDUSTRIES, LTD.
    Inventors: Kazuhisa Tsutsumi, Atsushi Maekawa, Masayuki Shimizu, Stephen Salter, Uwe Stein, William Rampen, Robert Fox, Hauke Karstens
  • Patent number: 8129791
    Abstract: There is provided a semiconductor device that includes: a transistor having a gate electrode, a source region, and a drain region; a first inter-layer insulation film covering the transistor; a first contact plug formed penetrating through the first inter-layer insulation film and connected to either the source region or the drain region; a second inter-layer insulation film covering the first contact plug; a groove extending in the second inter-layer insulation film in a same direction as an extending direction of the gate electrode and exposing a top surface of the first contact plug at a bottom thereof; a second contact plug connected to the first contact plug and formed in the groove; and a wiring pattern extending on the second inter-layer insulation film so as to traverse the groove and integrated with the second contact plug.
    Type: Grant
    Filed: August 21, 2009
    Date of Patent: March 6, 2012
    Assignee: Elpida Memory, Inc.
    Inventor: Atsushi Maekawa
  • Patent number: 7939405
    Abstract: A method of manufacturing a semiconductor device includes forming an inter-layer insulating film; arranging a plurality of grooves in a surface layer of the inter-layer insulating film; forming embedded insulating films which are embedded in the grooves; arranging a plurality of holes in the inter-layer insulating film and between the embedded insulating films, in a manner such that each hole between the embedded insulating films partially overlaps therewith; forming lower electrodes, each of which has a bottom and a side face, and covers the bottom and side faces of the corresponding hole; forming a capacitance insulating film which covers the lower electrodes; and forming an upper electrode which further covers the capacitance insulating film.
    Type: Grant
    Filed: August 19, 2008
    Date of Patent: May 10, 2011
    Assignee: Elpida Memory, Inc.
    Inventors: Atsushi Maekawa, Yoshitaka Nakamura
  • Publication number: 20110045650
    Abstract: A method of manufacturing a semiconductor device may include, but is not limited to the following processes. First and second electrodes are formed in a first insulating film over a semiconductor substrate. The first and second electrodes upwardly extend from the semiconductor substrate. The first and second electrodes have first and second upper portions protruding from an upper surface of the first insulating film, respectively. A support film, which covers the upper surface of the first insulating film and the first and second upper portions, is formed. The support film is patterned so that a remaining portion of the support film connects the first and second upper portions. The first insulating film is removed while the remaining portion mechanically supports the first and second electrodes.
    Type: Application
    Filed: August 19, 2010
    Publication date: February 24, 2011
    Applicant: Elpida Memory, Inc.
    Inventor: Atsushi Maekawa
  • Publication number: 20100221670
    Abstract: A method for forming a finer hole or line pattern including the step of sequentially depositing a first mask layer (3) and a first ARL (4) on a first layer (2) and patterning the first ARL; the step of sequentially depositing a second mask layer (6) and a second ARL (7) and patterning the second ARL; the step of removing the mask carbon layer by using the second ARL as a mask; the step of removing the first mask layer by using the second ARL and the exposed first ARL as masks; and removing the first layer by using the remaining first and second mask layers as masks.
    Type: Application
    Filed: February 26, 2010
    Publication date: September 2, 2010
    Applicant: ELPIDA MEMORY, INC.
    Inventor: Atsushi MAEKAWA
  • Patent number: 7767569
    Abstract: Method of forming a high-reliability contact plug which prevents a short circuit between the plug and a bit line by applying a material having an etching rate ratio of 100 or more with respect to a silicon nitride film which forms a self-aligned contact plug. After the formation of a bit line, whose top surface and side surfaces are covered with a silicon nitride film, a sacrificial interlayer film is formed which covers the whole surface of the bit line, and a contact hole is formed by etching the sacrificial interlayer film and then the lower-layer interlayer insulating film to form a capacitance contact plug. A column of a capacitance contact plug is then formed by removing the sacrificial interlayer film, a third interlayer insulating film is formed on the column, and part of this interlayer is removed to expose a surface of the contact plug.
    Type: Grant
    Filed: October 13, 2006
    Date of Patent: August 3, 2010
    Assignee: Elpida Memory, Inc.
    Inventor: Atsushi Maekawa
  • Patent number: 7737023
    Abstract: In a process for the manufacture of a semiconductor integrated circuit device having an inlaid interconnect structure by embedding a conductor film in a recess, such as a trench or hole, formed in an organic insulating film which constitutes an interlevel dielectric film and includes an organosiloxane as a main component, the recess, such as a trench or hole, is formed by subjecting the organic insulating film to plasma dry etching in a CF-based gas/N2/Ar gas in order to suppress the formation of an abnormal shape on the bottom of the recess, upon formation of a photoresist film over the organic insulating film, followed by formation of the recess therein with the photoresist film as an etching mask.
    Type: Grant
    Filed: August 19, 2008
    Date of Patent: June 15, 2010
    Assignee: Renesas Technology Corporation
    Inventors: Shouochi Uno, Atsushi Maekawa, Takashi Yunogami, Kazutami Tago, Kazuo Nojiri, Shuntaro Machida, Takafumi Tokunaga
  • Publication number: 20100044757
    Abstract: There is provided a semiconductor device that includes: a transistor having a gate electrode, a source region, arid a drain region; a first inter-layer insulation film covering the transistor; a first contact plug formed penetrating through the first inter-layer insulation film and connected to either the source region or the drain region; a second inter-layer insulation film covering the first contact plug; a groove extending in the second inter-layer insulation film in a same direction as an extending direction of the gate electrode and exposing a top surface of the first contact plug at a bottom thereof; a second contact plug connected to the first contact plug and formed in the groove; and a wiring pattern extending on the second inter-layer insulation film so as to traverse the groove and integrated with the second contact plug.
    Type: Application
    Filed: August 21, 2009
    Publication date: February 25, 2010
    Applicant: ELPIDA MEMORY, INC.
    Inventor: Atsushi MAEKAWA
  • Patent number: 7592249
    Abstract: A highly reliable method for forming contact plugs is provided. The method can prevent short circuiting from occurring between self aligned contact plugs and word lines or between self aligned contact plugs and bit lines by applying a material, whose etching speed ratio relative to that of the silicon-based insulating film is 100 or more, to an interlayer film for forming the contact plugs therein. The method comprises forming wiring lines each of which is covered with silicon oxide films at its top surface and lateral sides, forming a sacrificial interlayer film overall, which is made up of an organic coating film without containing silicon, so as to cover the wiring lines, forming contact holes by sequentially etching the sacrificial interlayer film and a lower-layer insulating film, and forming contact plugs.
    Type: Grant
    Filed: February 26, 2008
    Date of Patent: September 22, 2009
    Assignee: Elpida Memory, Inc.
    Inventor: Atsushi Maekawa
  • Publication number: 20090061589
    Abstract: A method of manufacturing a semiconductor device includes forming an inter-layer insulating film; arranging a plurality of grooves in a surface layer of the inter-layer insulating film; forming embedded insulating films which are embedded in the grooves; arranging a plurality of holes in the inter-layer insulating film and between the embedded insulating films, in a manner such that each hole between the embedded insulating films partially overlaps therewith; forming lower electrodes, each of which has a bottom and a side face, and covers the bottom and side faces of the corresponding hole; forming a capacitance insulating film which covers the lower electrodes; and forming an upper electrode which further covers the capacitance insulating film.
    Type: Application
    Filed: August 19, 2008
    Publication date: March 5, 2009
    Applicant: ELPIDA MEMORY, INC.
    Inventors: Atsushi MAEKAWA, Yoshitaka NAKAMURA
  • Publication number: 20090011592
    Abstract: In a process for the manufacture of a semiconductor integrated circuit device having an inlaid interconnect structure by embedding a conductor film in a recess, such as a trench or hole, formed in an organic insulating film which constitutes an interlevel dielectric film and includes an organosiloxane as a main component, the recess, such as a trench or hole, is formed by subjecting the organic insulating film to plasma dry etching in a CF-based gas/N2/Ar gas in order to suppress the formation of an abnormal shape on the bottom of the recess, upon formation of a photoresist film over the organic insulating film, followed by formation of the recess therein with the photoresist film as an etching mask.
    Type: Application
    Filed: August 19, 2008
    Publication date: January 8, 2009
    Inventors: Shouichi Uno, Atsushi Maekawa, Takashi Yunogami, Kazutami Tago, Kazuo Nojiri, Shuntaro Machida, Takafumi Tokunaga