Patents by Inventor Atsushi Mizuno

Atsushi Mizuno has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20080263230
    Abstract: An information processing apparatus includes an acquisition unit configured to acquire, from a plurality of image forming apparatuses, application information indicating a type of each application program installed on the plurality of image forming apparatuses, an application selection receiving unit configured to receive selection of an application program corresponding to the acquired application information, a setting information selection receiving unit configured to receive selection of setting information used in the application program whose selection has been received, an apparatus selection receiving unit configured to receive selection of an image forming apparatus as a destination to which to transmit the setting information from among image forming apparatuses installed with the application program whose selection has been received, and a transmission control unit configured to control processing for transmitting, to the image forming apparatus whose selection has been received, the setting inform
    Type: Application
    Filed: April 18, 2008
    Publication date: October 23, 2008
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: Atsushi Mizuno, Atsushi Daigo
  • Publication number: 20080130026
    Abstract: An information processing apparatus which performs a process on the basis of an access control information, or ACT, for control of a use of a function of a peripheral device for each user acquires setting information about the use of the function of the peripheral device specified by the user, and the ACT corresponding to the user. If the user-specified setting information is permitted by the ACT and if the setting information permitted by the ACT is not set by the user-specified setting information, the apparatus displays a screen indicating that the user-specified setting information can be changed according to the ACT.
    Type: Application
    Filed: August 22, 2007
    Publication date: June 5, 2008
    Applicant: CANON KABUSHIKI KAISHA
    Inventor: Atsushi Mizuno
  • Publication number: 20080104365
    Abstract: A design apparatus for designing a processor re-configurable for an application, includes an analysis unit that analyzes the content of a program to be executed by the processor; a hardware extension unit that searches the program for a part of the program allowing hardware extension in accordance with the analysis results by the analysis unit and generates hardware extension information for the searched part; an extended instruction definition unit that searches the program for a part allowing use of an extended instruction in accordance with the analysis results by the analysis unit and generates definition of an extended instruction for the searched part; and a performance estimation unit that estimates whether or not the performance of the processor satisfies a target performance using at least one of the hardware extension information generated by the hardware extension unit and the definition of the extended instruction generated by the extended instruction definition unit.
    Type: Application
    Filed: December 17, 2007
    Publication date: May 1, 2008
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Kazuhyoshi Kohno, Atsushi Mizuno, Atsushi Masuda, Ryuichiro Ohyama, Yutaka Ota
  • Patent number: 7340692
    Abstract: In this disclosure, based on change item definition information concerning system LSI development and design, software used for development and design of a system LSI that contains a processor having optional instructions defined therein is operated, and system LSI hardware description, verification environment and a development and design tools are generated, thus making it possible to develop a system LSI optimal to an application within a short period.
    Type: Grant
    Filed: July 18, 2003
    Date of Patent: March 4, 2008
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Nobuo Matsui, Atsushi Mizuno, Ryuichiro Ohyama, Megumi Tangoda, Katsuya Uchida
  • Patent number: 7337301
    Abstract: A design apparatus for designing a configurable processor for an application, includes an analysis unit that analyzes the content of a program to be executed by the processor; a hardware extension unit that searches the program for a part of the program allowing hardware extension in accordance with the analysis results by the analysis unit and generates hardware extension information for the searched part; an extension instruction definition unit that searches the program for a part allowing use of an extension instruction in accordance with the analysis results by the analysis unit and generates definition of an extension instruction for the searched part; and a performance estimation unit that estimates whether or not the performance of the processor satisfies a target performance using at least one of the hardware extension information generated by the hardware extension unit and the definition of the extension instruction generated by the extension instruction definition unit.
    Type: Grant
    Filed: January 28, 2005
    Date of Patent: February 26, 2008
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kazuyoshi Kohno, Atsushi Mizuno, Atsushi Masuda, Ryuichiro Ohyama, Yutaka Ota
  • Publication number: 20070288996
    Abstract: Disclosed is a network management method which includes a setting step of setting function restriction information for restricting a function of a device that is connected to a network; and a determination step of determining which user can access for each of a plurality of groups in the network, the setting step further including setting the function restriction information about the user determined to be able to access in the determination step.
    Type: Application
    Filed: May 2, 2007
    Publication date: December 13, 2007
    Applicant: CANON KABUSHIKI KAISHA
    Inventor: Atsushi Mizuno
  • Publication number: 20070282995
    Abstract: A plurality of device groups are layered and displayed on a display unit based on management information for grouping a plurality of image processing devices and managing them as a device group having a layer attribute. Setting of function restriction information on a function restricted in use in executing a job is accepted for the device group selected from the device groups. The function restriction information is set for all image processing devices in the set device group. At this time, the set function restriction information is set for a group of image processing devices on a lower layer of the selected device group.
    Type: Application
    Filed: April 13, 2007
    Publication date: December 6, 2007
    Inventors: Atsushi Mizuno, Yasuhiro Hosoda
  • Patent number: 7304752
    Abstract: When a first user on a network is to provide information to a second user, this invention allows the second user to visually output the information even if an information processor used by the second user does not have a function of reading electronic data as a source of the information. In this invention, when information formed by a PC (111) on a network (110) is to be output to the user of a PC (103) on the network (100), the PC (111) issues a print job to a printer (102) and notifies the PC (103) of the issue. Upon receiving this notification, the PC (103) gives execution designation of the job to the printer (102). The print job is then executed, and the printed product is handed over to the user of the PC (103).
    Type: Grant
    Filed: April 6, 2001
    Date of Patent: December 4, 2007
    Assignee: Canon Kabushiki Kaisha
    Inventor: Atsushi Mizuno
  • Publication number: 20070106910
    Abstract: A print management system obtains ability information of a new printing device with reference to a device management table, when the new printing device is connected to a network. Then, the print management system obtains an encryption key (public key) of the new printing device, and registers the obtained encryption key and a network address of the new printing device into the device management table.
    Type: Application
    Filed: October 27, 2006
    Publication date: May 10, 2007
    Applicant: CANON KABUSHIKI KAISHA
    Inventor: Atsushi Mizuno
  • Patent number: 7171632
    Abstract: An apparatus for designing a semiconductor integrated circuit having a configurable processor includes: a software information storage section storing software information including software descriptions; a hardware information storage section storing hardware information including hardware descriptions of the semiconductor integrated circuit; a processor information storage section storing processor information; a hardware implementation specification section specifying an algorithm of a portion to be implemented by hardware from among the software descriptions; a hardware changing section generating hardware descriptions from the algorithm of the specified portion, and changing the hardware information and the processor information; a software changing section generating software descriptions in which the algorithm of the specified portion is replaced with an algorithm for controlling the implemented hardware, and changing the software information; and a performance analyzer analyzing a performance of the s
    Type: Grant
    Filed: May 24, 2004
    Date of Patent: January 30, 2007
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Atsushi Masuda, Atsushi Mizuno
  • Publication number: 20060200796
    Abstract: A program development apparatus includes a storage device configured to store an operation definition defining a program description in a source program subjected to be optimized and a complex intrinsic function including an inline clause describing statements after the optimization. An analyzer is configured to perform a syntax analysis of the complex intrinsic function by reading the complex intrinsic function out of the storage device, so as to detect the operation definition and the inline clause. A code generator is configured to generate an object code from the source program by optimizing a program description corresponding to the operation definition in the source program into the statements in the inline clause.
    Type: Application
    Filed: February 28, 2006
    Publication date: September 7, 2006
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Yutaka Ota, Atsushi Mizuno
  • Publication number: 20060013720
    Abstract: The present invention provides steel superior in machinability comprised of, by wt %, C: 0.005 to 0.2%, Si: 0.001 to 0.5%, Mn: 0.2 to 3.0%, P: 0.001 to 0.2%, S: 0.03 to 1.0%, T.N: 0.002 to 0.02%, T.O: 0.0005 to 0.035%, and the balance of Fe and unavoidable impurities, said steel satisfying one or both of Mn/S in the steel being 1.2 to 2.8 or an area ratio of pearlite over a grain size of 1 ?m in a microstructure of the steel being not more than 5%.
    Type: Application
    Filed: November 14, 2003
    Publication date: January 19, 2006
    Inventors: Masayuki Hashimura, Atsushi Mizuno, Kenichiro Naito, Hiroshi Hagiwara, Kohichi Isobe, Hiroshi Hirata
  • Publication number: 20050193184
    Abstract: A design apparatus for designing a configurable processor for an application, includes an analysis unit that analyzes the content of a program to be executed by the processor; a hardware extension unit that searches the program for a part of the program allowing hardware extension in accordance with the analysis results by the analysis unit and generates hardware extension information for the searched part; an extension instruction definition unit that searches the program for a part allowing use of an extension instruction in accordance with the analysis results by the analysis unit and generates definition of an extension instruction for the searched part; and a performance estimation unit that estimates whether or not the performance of the processor satisfies a target performance using at least one of the hardware extension information generated by the hardware extension unit and the definition of the extension instruction generated by the extension instruction definition unit.
    Type: Application
    Filed: January 28, 2005
    Publication date: September 1, 2005
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Kazuyoshi Kohno, Atsushi Mizuno, Atsushi Masuda, Ryuichiro Ohyama, Yutaka Ota
  • Publication number: 20050076314
    Abstract: In this disclosure, based on change item definition information concerning system LSI development and design, software used for development and design of a system LSI that contains a processor having optional instructions defined therein is operated, and system LSI hardware description, verification environment and a development and design tools are generated, thus making it possible to develop a system LSI optimal to an application within a short period.
    Type: Application
    Filed: July 18, 2003
    Publication date: April 7, 2005
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Nobuo Matsui, Atsushi Mizuno, Ryuichiro Ohyama, Megumi Tangoda, Katsuya Uchida
  • Publication number: 20050039148
    Abstract: An apparatus for designing a semiconductor integrated circuit having a configurable processor includes: a software information storage section storing software information including software descriptions; a hardware information storage section storing hardware information including hardware descriptions of the semiconductor integrated circuit; a processor information storage section storing processor information; a hardware implementation specification section specifying an algorithm of a portion to be implemented by hardware from among the software descriptions; a hardware changing section generating hardware descriptions from the algorithm of the specified portion, and changing the hardware information and the processor information; a software changing section generating software descriptions in which the algorithm of the specified portion is replaced with an algorithm for controlling the implemented hardware, and changing the software information; and a performance analyzer analyzing a performance of the s
    Type: Application
    Filed: May 24, 2004
    Publication date: February 17, 2005
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Atsushi Masuda, Atsushi Mizuno
  • Patent number: 6745365
    Abstract: An encoder and a decoder each having an error correcting operation, and a data transmission apparatus using them for data transmission in a multilevel modulation system. In transmission data is converted into parallel data. One bit thereof is inputted to a convolutional encoder to output two bits. Two bit data and another signal of the parallel data not inputted to the convolutional encoder are respectively separated into real part and imaginary part to independently decide signal points for the parallel data. In reception an area is similarly decided independently for real and imaginary parts and metric is assigned for the data. Real and imaginary parts are combined with each other for Viterbi decoding. Result thereof is fed to a convolutional encoder similar in constitution to that on transmission side. Using convolutional encoding output and decided area, transmission data is decoded.
    Type: Grant
    Filed: December 28, 2000
    Date of Patent: June 1, 2004
    Assignees: Hitachi Kokusai Electric Inc., Nippon Hoso Kyokai
    Inventors: Yoshiro Kokuryo, Atsushi Mizuno, Kunihiko Kondo, Nobuo Tsukamoto, Kenji Terada, Tetsuomi Ikeda
  • Patent number: 6634017
    Abstract: In this disclosure, based on change item definition information concerning system LSI development and design, software used for development and design of a system LSI that contains a processor having optional instructions defined therein is operated, and system LSI hardware description, verification environment and a development and design tools are generated, thus making it possible to develop a system LSI optimal to an application within a short period.
    Type: Grant
    Filed: May 29, 2001
    Date of Patent: October 14, 2003
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Nobuo Matsui, Atsushi Mizuno, Ryuichiro Ohyama, Megumi Tangoda, Katsuya Uchida
  • Publication number: 20020147957
    Abstract: In this disclosure, based on change item definition information concerning system LSI development and design, software used for development and design of a system LSI that contains a processor having optional instructions defined therein is operated, and system LSI hardware description, verification environment and a development and design tools are generated, thus making it possible to develop a system LSI optimal to an application within a short period.
    Type: Application
    Filed: May 29, 2001
    Publication date: October 10, 2002
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Nobuo Matsui, Atsushi Mizuno, Ryuichiro Ohyama, Megumi Tangoda, Katsuya Uchida
  • Publication number: 20010034594
    Abstract: In the design verification method, the design verification device, and the pipeline simulator generation device for microprocessors, a pipeline simulator (4, S4, S12) and verification programs for a microprocessor as a target in design are automatically generated (7, S9, S10) based on a pipeline specification described in a description language readable and analyzable by a computer, and the pipeline operation of the microprocessor is verified (12, S15, S16) based on the results (S13) of the simulation (11) of the RTL description and the result (6, S14) of the pipeline simulation performed based on the verification programs and the pipeline simulator.
    Type: Application
    Filed: March 26, 2001
    Publication date: October 25, 2001
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Kazuyoshi Kohno, Atsushi Mizuno
  • Publication number: 20010029516
    Abstract: When a first user on a network is to provide information to a second user, this invention allows the second user to visually output the information even if an information processor used by the second user does not have a function of reading electronic data as a source of the information. In this invention, when information formed by a PC (111) on a network (110) is to be output to the user of a PC (103) on the network (100), the PC (111) issues a print job to a printer (102) and notifies the PC (103) of the issue. Upon receiving this notification, the PC (103) gives execution designation of the job to the printer (102). The print job is then executed, and the printed product is handed over to the user of the PC (103).
    Type: Application
    Filed: April 6, 2001
    Publication date: October 11, 2001
    Inventor: Atsushi Mizuno