Patents by Inventor Atsushi Naito

Atsushi Naito has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20030154207
    Abstract: Data entry on an information device is facilitated by an information processing system comprising an information device equipped with a display unit and an input unit. The information processing system further comprises a control unit for coordinating the operation of a first application running on the information device and that of a second to nth (n=an integer of more than 2) applications that are relevant to the first application and running on the information device. The control unit has an application menu display function for displaying an application menu on the display unit upon selection of specific data by the input unit from data displayed on the display unit in the first application, the menu showing the name of at least one application selected from the second to nth applications.
    Type: Application
    Filed: February 11, 2003
    Publication date: August 14, 2003
    Inventor: Atsushi Naito
  • Patent number: 5465091
    Abstract: A touch sensor has an LC oscillator circuit 1, 2, 3, and 4, a rectification circuit 10 which rectifies outputs of the oscillator circuit 1, 2, 3, and 4, a voltage detection circuit 12, 13, 14, and 15 which detects the rectified voltage, and a sensor plate 8 connected to the input section of the rectification circuit, and detecting contact of a finger with the sensor plate 8 by enabling the voltage detection circuit 12, 13, 14, and 15 to detects a drop of equivalent impedance due to a finger touching the sensor plate 8 as a change of voltage.
    Type: Grant
    Filed: February 16, 1994
    Date of Patent: November 7, 1995
    Assignees: Showa Shell Sekiyu K.K., Matsushita Electric Industrial Co., Ltd.
    Inventors: Atsushi Nishino, Akihiko Yoshida, Teruo Namba, Masaaki Aoki, Atsushi Naito
  • Patent number: 5055717
    Abstract: Data selector circuit including a plurality of data registers connected in parallel via corresponding output buffers to a plurality of output drivers, wherein a decoder and selector portion is interposed between the output buffers and the output drivers for selectively providing one of a plurality of serial data output sequences from the data registers to the output drivers rather than a parallel data output format from the plurality of data registers which would otherwise occur. The decoder and selector portion is controlled by a partial address buffer which is provided with serial sequence selection data.
    Type: Grant
    Filed: August 24, 1989
    Date of Patent: October 8, 1991
    Assignee: Texas Instruments Incorporated
    Inventors: Atsushi Naito, Kiyoshi Nakatsuka, Seiichi Yamamoto, Takashi Inui, Tomohiro Suzuki
  • Patent number: 4808857
    Abstract: A sense amplifier circuit is described for switching plural inputs at high speed. At least two transistors for providing at least two true input signals are connected in parallel and have their source terminals connected to a common node from which an output signal may be read. Similarly, at least two other transistors for providing the inverse of the true input signals are connected in parallel and their source terminals are connected to another common node from which an inverse of the output signal may be read. The common nodes are then precharged to the same voltage. True and inverse input signals are applied to their respective transistors through transfer gates where all the true input signals are greater than their respective inverse signals. Therefore, the on-resistance of each of the transistors to which a true input is applied have a higher on-resistance than the associated transistors to which an inverse input is applied.
    Type: Grant
    Filed: June 2, 1988
    Date of Patent: February 28, 1989
    Assignee: Texas Instruments Incorporated
    Inventors: Atsushi Naito, Kiyoshi Nakatsuka, Takashi Inui, Tomohiro Suzuki
  • Patent number: 4460765
    Abstract: A new compound, named "Griseolic acid", and its salts and can be prepared by the cultivation of Streptomyces griseoaurantiacus SANK 63479 (FERM-P 5223). Griseolic acid and its salts inhibit the activity of the enzyme cyclic adenosine monophosphate phosphodiesterase and, as a result of this, have variety of physiological activities and uses.
    Type: Grant
    Filed: May 12, 1982
    Date of Patent: July 17, 1984
    Assignee: Sankyo Company Limited
    Inventors: Atsushi Naito, Fumio Nakagawa, Takao Okazaki, Akira Terahara, Seigo Iwado, Mitsuo Yamazaki