Patents by Inventor Atsushi NATAKA

Atsushi NATAKA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240154857
    Abstract: A protocol analyzer of the present disclosure includes a protocol check circuit that relays a control plane and a user plane between a radio unit and a base band unit while performing detection of an error in the control plane and the user plane, and a failure detection packet generation unit configured to generate a failure detection packet based on error factor information generated by the protocol check circuit in response to detection of the error in the control plane and the user plane and based on the ether head of the control plane or the user plane in which the error has been detected and a timestamp, in which the protocol check circuit interprets the control plane and the user plane based on information in a management plane that determines transmission-reception conditions for the control plane and the user plane between the radio unit and the base band unit.
    Type: Application
    Filed: March 11, 2021
    Publication date: May 9, 2024
    Applicants: NEC Corporation, NEC Corporation
    Inventors: Yusuke OGIHARA, Atsushi NATAKA, Takashi USUKURA, Yuji SIMOYAMA