Patents by Inventor Atsushi Saiki
Atsushi Saiki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10551658Abstract: An image display apparatus that that can easily separate an image display apparatus from a touch panel. The image display apparatus comprises a liquid crystal panel (image display apparatus main body), a touch panel that has a fine, uneven structure on its surface and faces the liquid crystal panel via a gap, and an adhesive member for securing these, the adhesive member comprising a substrate, a first adhesive layer, and a second adhesive layer, wherein an adhesive strength (W1) between the first adhesive layer and the liquid crystal panel is less than an adhesive strength (W3) of the first adhesive layer and the substrate, an adhesive strength (W3?) of the second adhesive layer and the substrate, and an adhesive strength (W5) of the second adhesive layer and the touch panel, and wherein a breaking strength (W4) of the substrate is greater than W3? and/or W5.Type: GrantFiled: December 10, 2015Date of Patent: February 4, 2020Assignee: Mitsubishi Chemical CorporationInventors: Atsushi Saiki, Hiroki Nakamura
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Publication number: 20170315396Abstract: An image display apparatus that that can easily separate an image display apparatus from a touch panel. The image display apparatus comprises a liquid crystal panel (image display apparatus main body), a touch panel that has a fine, uneven structure on its surface and faces the liquid crystal panel via a gap, and an adhesive member for securing these, the adhesive member comprising a substrate, a first adhesive layer, and a second adhesive layer, wherein an adhesive strength (W1) between the first adhesive layer and the liquid crystal panel is less than an adhesive strength (W3) of the first adhesive layer and the substrate, an adhesive strength (W3?) of the second adhesive layer and the substrate, and an adhesive strength (W5) of the second adhesive layer and the touch panel, and wherein a breaking strength (W4) of the substrate is greater than W3? and/or W5.Type: ApplicationFiled: December 10, 2015Publication date: November 2, 2017Applicant: Mitsubishi Chemical CorporationInventors: Atsushi SAIKI, Hiroki NAKAMURA
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Publication number: 20160221315Abstract: This laminate film used in a touch panel device is provided with a substrate, a refractive index adjusting layer which is provided on the first side of the substrate, a transparent conductive layer provided on the side of the refractive index adjustment layer opposite the substrate, and a fine uneven structure layer provided on the second side of the substrate, wherein the fine uneven structure layer has a fine uneven structure in which the average interval between protrusions and recesses on the surface is 400 nm or less, and is provided on the second surface of the substrate such that the surface opposite of the surface having the fine uneven structure faces towards the substrate.Type: ApplicationFiled: September 17, 2014Publication date: August 4, 2016Applicant: Mitsubishi Rayon Co., Ltd.Inventor: Atsushi SAIKI
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Publication number: 20150060289Abstract: A method of manufacturing a stamper of the invention includes: performing a blast process on an aluminum base material, and thereafter anodizing a processing surface of the blast-processed aluminum base material so that a structure which includes a rough rugged structure having an specific arithmetic average roughness Ra and a specific period Sm and a fine rugged structure which is formed on the rough rugged structure to have a shorter period than that of the rough rugged structure is formed on a surface of the aluminum base material. In the stamper of the invention, by anodizing the processing surface of the blast-processed aluminum base material, the structure which includes the specific rough rugged structure and the fine rugged structure which is formed on the specific rough rugged structure to have a shorter period than that of the rough rugged structure is formed on the surface of the aluminum base material.Type: ApplicationFiled: December 26, 2012Publication date: March 5, 2015Inventors: Atsushi Saiki, Ayaka Kuwahara
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Patent number: 8022305Abstract: A semiconductor device fabrication method includes: forming an elongated hole 5 in a wiring board plate along a perimeter line 3 of a plurality of wiring board regions defined over the wiring board plate with a connecting portion left unremoved at a corner of each of the wiring board regions; mounting semiconductor elements on the wiring board regions; and cutting the connecting portion using a punch 8 to isolate the wiring board regions from the wiring board plate into wiring boards. Each of the wiring boards has a cut edge formed by the punch, the cut edge starting from an end of the elongated hole 5 provided on a first side of the perimeter line 3 and extending across part of the connecting portion inside the perimeter line 3, the cut edge being angled inward of the wiring board so as to slope downward from the end of the elongated hole 5.Type: GrantFiled: April 23, 2009Date of Patent: September 20, 2011Assignee: Panasonic CorporationInventors: Takashi Yui, Atsushi Saiki
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Patent number: 7766532Abstract: A light guide (3) for a surface light source used to constitute a surface light source in combination with a primary light source (1) and guiding light emitted from the primary light source (1). The light guide (3) has a light incident end face (31) on which the light emitted from the primary light source (1) impinges, a light exit face (33) from which guided light exits, and a rear surface (34) on the opposite side. A plurality of prism arrays (34a) extending in a direction traversing the light incident end face (31) are formed on at least one of the light exit face (33) and the rear surface (34), and each prism array (34a) has a plurality of divided top portions (34a1, 34a2) where the top is divided in the cross-section profile thereof in at least a partial region in the extending direction.Type: GrantFiled: July 12, 2006Date of Patent: August 3, 2010Assignee: Mitsubishi Rayon Co., Ltd.Inventors: Makoto Ookawa, Yasushi Watanabe, Yoshihito Nozaki, Yoshiaki Murayama, Hiroki Matsumoto, Atsushi Saiki
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Publication number: 20090284942Abstract: A semiconductor device fabrication method includes: forming an elongated hole 5 in a wiring board plate along a perimeter line 3 of a plurality of wiring board regions defined over the wiring board plate with a connecting portion left unremoved at a corner of each of the wiring board regions; mounting semiconductor elements on the wiring board regions; and cutting the connecting portion using a punch 8 to isolate the wiring board regions from the wiring board plate into wiring boards. Each of the wiring boards has a cut edge formed by the punch, the cut edge starting from an end of the elongated hole 5 provided on a first side of the perimeter line 3 and extending across part of the connecting portion inside the perimeter line 3, the cut edge being angled inward of the wiring board so as to slope downward from the end of the elongated hole 5.Type: ApplicationFiled: April 23, 2009Publication date: November 19, 2009Inventors: Takashi YUI, Atsushi SAIKI
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Publication number: 20090034294Abstract: A light guide (3) for a surface light source used to constitute a surface light source in combination with a primary light source (1) and guiding light emitted from the primary light source (1). The light guide (3) has a light incident end face (31) on which the light emitted from the primary light source (1) impinges, a light exit face (33) from which guided light exits, and a rear surface (34) on the opposite side. A plurality of prism arrays (34a) extending in a direction traversing the light incident end face (31) are formed on at least one of the light exit face (33) and the rear surface (34), and each prism array (34a) has a plurality of divided top portions (34a1, 34a2) where the top is divided in the cross-section profile thereof in at least a partial region in the extending direction.Type: ApplicationFiled: July 12, 2006Publication date: February 5, 2009Applicant: Mitsubishi Rayon Co., Ltd.Inventors: Makoto Ookawa, Yasushi Watanabe, Yoshihito Nozaki, Yoshiaki Murayama, Hiroki Matsumoto, Atsushi Saiki
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Patent number: 6747339Abstract: A semiconductor device wherein a coating film which is made of a polyimide resin or a polyimide isoindoloquinazolinedione resin and which is at least 10 &mgr;m thick is disposed on at least an active region of a semiconductor substrate, and the resultant semiconductor substrate is encapsulated in a ceramic package. The semiconductor device has troubles relieved conspicuously, the troubles being ascribable to alpha-rays which come flying from impurities contained in the material of the package.Type: GrantFiled: December 22, 1994Date of Patent: June 8, 2004Assignee: Hitachi, Ltd.Inventors: Kiichiro Mukai, Atsushi Saiki, Seiki Harada
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Patent number: 5391915Abstract: A semiconductor device wherein a coating film which is made of a polyimide resin or a polyimide isoindoloquinazolinedione resin and which is at least 10 .mu.m thick is disposed on at least an active region of a semiconductor substrate, and the resultant semiconductor substrate is encapsulated in a ceramic package. The semiconductor device has troubles relieved conspicuously, the troubles being ascribable to alpha-rays which come flying from impurities contained in the material of the package.Type: GrantFiled: December 13, 1993Date of Patent: February 21, 1995Assignee: Hatachi, Ltd.Inventors: Kiichiro Mukai, Atsushi Saiki, Seiki Harada
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Patent number: 4926238Abstract: A semiconductor device wherein a coating film which is made of a polyimide resin or a polyimide isoindoloquinazolinedione resin and which is at least 10 .mu.m thick is disposed on at least an active region of a semiconductor substrate, and the resultant semiconductor substrate is encapsulated in a ceramic package. The semiconductor device has troubles relieved conspicuously, the troubles being ascribable to alpha-rays which come flying from impurities contained in the material of the package.Type: GrantFiled: September 30, 1988Date of Patent: May 15, 1990Assignee: Hitachi, Ltd.Inventors: Kiichiro Mukai, Atsushi Saiki, Seiki Harada
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Patent number: 4693173Abstract: A clean room wherein clean air obtained through filters from the upper portion of the clean room is blown toward the floor, through the openings in the floor, and with the clean air being discharged again through the filters from the upper portion of the clean room. The air flow rate of clean air in the aisle areas is greater than the air flow rate in the wafer handling areas, and the opening rate of the floor is smaller in the portion near to an air return under the floor than in the portion remote from the air return thereby greatly reducing the diffusion of dust to the wafer handling areas.Type: GrantFiled: October 11, 1985Date of Patent: September 15, 1987Assignees: Hitachi Plant Engineering & Construction Co., Ltd., Hitachi, Ltd.Inventors: Atsushi Saiki, Michio Suzuki, Hideo Sunami, Shojiro Asai, Michiyoshi Maki, Kinichiro Asami
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Patent number: 4539616Abstract: Herein disclosed is a thin film magnetic head which is so constructed that a conductor layer arranged in a non-magnetic insulating layer isolating two magnetic poles and adapted to form a coil of plural turns has a height made larger than the width and gap thereof. A method of fabricating that head includes the step of forming a non-magnetic insulating layer, the step of etching the insulating layer by using a mask layer formed thereover as a mask, the step of depositing a metal for providing a conductor layer, the step of removing the mask layer together with the metal thereover, and the step forming a coating of a non-magnetic insulating layer thereover, thereby to form the conductor layer. The head thus fabricated has its magnetic recording and reproducing characteristics improved.Type: GrantFiled: July 20, 1982Date of Patent: September 3, 1985Assignee: Hitachi, Ltd.Inventors: Isamu Yuito, Kazuo Shiiki, Atsushi Saiki, Yoshio Homma, Noriyuki Kumasaka, Yoshihiro Shiroishi, Mitsuhiro Kudo
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Patent number: 4436583Abstract: Disclosed is a selective etching method of a polyimide type resin film which uses an etching mask consisting of a negative type photoresist material prepared by adding a photosensitive reagent to an unsaturated ketone polymer such as polymethylisopropenylketone as the base resin and an etching solution consisting of 20 to 40% by volume of hydrazine hydrate and the balance of a polyamine. The etching method of the present invention can provide the pattern of the polyimide type resin film having high dimensional accuracy by wet etching.Type: GrantFiled: November 30, 1982Date of Patent: March 13, 1984Assignee: Hitachi, Ltd.Inventors: Atsushi Saiki, Takao Iwayanagi, Saburo Nonogaki, Takashi Nishida, Seiki Harada
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Patent number: 4225702Abstract: A method of preparing a polyamide acid type intermediate is provided, by using a purified inert solvent and monomer compounds, or diamine and/or diaminoamide compounds and a tetracarboxylic acid dianhydride, whose ionic impurities and free acid contents were reduced by recrystallization purification. The polyamide acid type intermediate may improve electrical properties and heat resistance of semiconductors when it is applied to, for instance, a surface-protecting film of semiconductors or an interlayer-insulating film of semiconductors having a multiple layer wiring structure.Type: GrantFiled: February 1, 1979Date of Patent: September 30, 1980Assignee: Hitachi Chemical Company, Ltd.Inventors: Daisuke Makino, Yasuo Miyadera, Seiki Harada, Atsushi Saiki
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Patent number: 4218283Abstract: A semiconductor device fabricated by forming a layer of cured polyimide resin on a semiconductor body, forming a photoresist layer having a prescribed pattern on said cured layer, immersing in an etchant consisting of hydrazine and ethylenediamine to said cured layer through said prescribed pattern, whereby said cured layer is precisely etched according to said prescribed pattern and prescribed surfaces of said semiconductor body are exposed, forming a metal layer on the surface of said polyimide and the prescribed surfaces of said body, and selectively etching said metal layer so as to form a prescribed pattern.Type: GrantFiled: July 12, 1978Date of Patent: August 19, 1980Assignee: Hitachi, Ltd.Inventors: Atsushi Saiki, Toshio Okubo, Seiki Harada
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Patent number: 4113550Abstract: A semiconductor device fabricated by forming a layer of semicured polyimide resin on a semiconductor body, forming a photoresist layer having a prescribed pattern on said semicured layer, immersing in an etchant consisting of hydrazine and ethylenediamine to said semicured layer through said prescribed pattern, whereby said semicured layer is precisely etched according to said prescribed pattern and prescribed surfaces of said semiconductor body are exposed, curing said semicured polyimide so as to form a layer of said polyimide resin, forming a metal layer on the surface of said polyimide and the prescribed surfaces of said body, and selectively etching said metal layer so as to form a prescribed pattern.Type: GrantFiled: June 11, 1976Date of Patent: September 12, 1978Assignee: Hitachi, Ltd.Inventors: Atsushi Saiki, Toshio Okubo, Seiki Harada
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Patent number: 4040083Abstract: Disclosed is a semiconductor device including a Si body, and SiO.sub.2 layer disposed on the surface of the body, an aluminum oxide layer having a thickness of about 50 A on the SiO.sub.2 layer, which is formed by applying a solution including an aluminum chelate compound onto the SiO.sub.2 layer and heating the solution at a temperature of 300.degree. C. for 30 minutes, and a polymer resin layer of polyimide disposed on the aluminum oxide layer. In this device, the adhesive-strength between the SiO.sub.2 layer and the polyimide layer is remarkably increased when compared with a semiconductor device wherein the polyimide layer is directly disposed on the SiO.sub.2 layer.Type: GrantFiled: November 22, 1974Date of Patent: August 2, 1977Assignee: Hitachi, Ltd.Inventors: Atsushi Saiki, Seiki Harada, Yoichi Oba
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Patent number: 4017886Abstract: Disclosed is a discrete semiconductor device comprising a Si body having an emitter region, a base region and a collector region, an SiO.sub.2 layer disposed on the surface of the body, a polyimide resin having a thickness of 5 .mu. disposed on the SiO.sub.2 layer, electrodes penetrating through the SiO.sub.2 layer and the polyimide resin thereby contacting the emitter region and the base region, respectively and extending on the surface of the polyimide resin, whereby it becomes easy to bond a wire connected to an external electrode with the electrodes.Type: GrantFiled: May 16, 1975Date of Patent: April 12, 1977Assignee: Hitachi, Ltd.Inventors: Masami Tomono, Akira Abe, Seiki Harada, Kikuji Sato, Takeshi Takagi, Genichi Kamoshita, Yuichiro Oya, Atsushi Saiki
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Patent number: 4001870Abstract: An insulating film provided on the surface of a semiconductor device having a protective film of silicon dioxide is composed of a double layer. The double layer consists of a thin film which is disposed on at least a part of the protective film of silicon dioxide and which is made of an organic compound containing either an amino group as well as an alkoxysilane group or an epoxy group as well as an alkoxysilane group, and a film which is disposed so as to cover the thin film of an organic compound and which is made of a heat-resisting polymer resin.The heat-resisting polymer is the reaction product of 4,4'-diamino-diphenylether, 4,4'-diamino-diphenyl ether-3-carbonyl amide, and pyromellitic acid dianhydride.Type: GrantFiled: November 30, 1973Date of Patent: January 4, 1977Assignee: Hitachi, Ltd.Inventors: Atsushi Saiki, Kikuji Sato, Seiki Harada, Terue Tsunoda, Yoichi Oba