Abstract: A circuit design apparatus includes a storage that stores a first capacitance of a capacitor associated with one or more usage conditions, and a controller that controls an amount of energy of the capacitor under a specified usage condition of the one or more usage conditions. The controller calculates a second capacitance under the specified usage condition based on a first relationship between the specified usage condition and the first capacitance, and calculates the amount of energy of the capacitor based on the calculated second capacitance.

Abstract: A capacitor simulation method and nonlinear equivalent circuit model enabling dynamic simulation of nonlinear characteristics when direct-current voltage is applied with high precesion are easily provided using a simple configuration. An equivalent circuit of a capacitor is represented using a series circuit of passive circuit elements. Characteristic change ratios of the passive circuit elements when a direct-current voltage is applied are expressed as an approximate function on the basis of an actually measured value. A reference voltage is referred to by control current sources connected in parallel to the passive circuit elements. The characteristic change ratios are calculated in accordance with the reference voltage Vref.

Abstract: A capacitor component includes multilayer ceramic capacitors and an interposer board on which the multilayer ceramic capacitors are mounted. The interposer board is provided with four or more lands that are electrically connected to the corresponding external electrodes of the multilayer ceramic capacitors, an input terminal, and an output terminal, and each of the four or more lands is electrically connected to one of the input terminal and the output terminal.

Abstract: A capacitor component includes multilayer ceramic capacitors and an interposer board on which the multilayer ceramic capacitors are mounted. The interposer board is provided with four or more lands that are electrically connected to the corresponding external electrodes of the multilayer ceramic capacitors, an input terminal, and an output terminal, and each of the four or more lands is electrically connected to one of the input terminal and the output terminal.

Abstract: A circuit design apparatus includes a storage that stores a first capacitance of a capacitor associated with one or more usage conditions, and a controller that controls an amount of energy of the capacitor under a specified usage condition of the one or more usage conditions. The controller calculates a second capacitance under the specified usage condition based on a first relationship between the specified usage condition and the first capacitance, and calculates the amount of energy of the capacitor based on the calculated second capacitance.

Abstract: A method for deriving an equivalent circuit model of a capacitor which makes it possible to derive, with high accuracy and with ease, an equivalent circuit model having characteristics in accordance with a direct current voltage applied to a capacitor. Characteristic values of predetermined resistive elements and capacitive elements forming an equivalent circuit model of a capacitor change in response to a DC bias voltage being applied to the capacitor, and the change is attributable to the material of a dielectric forming the capacitor. However, by multiplying the characteristic values of the resistive elements and the capacitive elements held while the DC bias voltage is not applied by a dimensionless coefficient in accordance with an application rule, the characteristic values of the resistive elements and the capacitive elements are corrected to values in accordance with the voltage of the DC bias voltage applied to the capacitor.

Abstract: A capacitor simulation method and nonlinear equivalent circuit model enabling dynamic simulation of nonlinear characteristics when direct-current voltage is applied with high precesion are easily provided using a simple configuration. An equivalent circuit of a capacitor is represented using a series circuit of passive circuit elements. Characteristic change ratios of the passive circuit elements when a direct-current voltage is applied are expressed as an approximate function on the basis of an actually measured value. A reference voltage is referred to by control current sources connected in parallel to the passive circuit elements. The characteristic change ratios are calculated in accordance with the reference voltage Vref.

Abstract: It is an object of the present invention to provide a technology that a microcomputer is capable of detecting the states of a large number of switches with a small number of ports. In a microcomputer system according to the present invention, any one of (2N?1) kinds of the combination patterns with respect to the combination of N input ports (IP1 to IP4) of a microcomputer (1) is allocated to each of M push-down switches (SW12, SW13, SW14, SW23, SW24, and SW34) with the different combination from each push-down switch. Each push-down switch inverts the input levels of the input ports in the combination pattern allocated thereto when pushed down. The microcomputer (1) detects the state of each push-down switch on the basis of the input levels of the N input ports.

Abstract: A method for deriving an equivalent circuit model of a capacitor which makes it possible to derive, with high accuracy and with ease, an equivalent circuit model having characteristics in accordance with a direct current voltage applied to a capacitor. Characteristic values of predetermined resistive elements and capacitive elements forming an equivalent circuit model of a capacitor change in response to a DC bias voltage being applied to the capacitor, and the change is attributable to the material of a dielectric forming the capacitor. However, by multiplying the characteristic values of the resistive elements and the capacitive elements held while the DC bias voltage is not applied by a dimensionless coefficient in accordance with an application rule, the characteristic values of the resistive elements and the capacitive elements are corrected to values in accordance with the voltage of the DC bias voltage applied to the capacitor.

Abstract: It is an object of the present invention to provide a technology that a microcomputer is capable of detecting the states of a large number of switches with a small number of ports. In a microcomputer system according to the present invention, any one of (2N?1) kinds of the combination patterns with respect to the combination of N input ports (IP1 to IP4) of a microcomputer (1) is allocated to each of M push-down switches (SW12, SW13, SW14, SW23, SW24, and SW34) with the different combination from each push-down switch. Each push-down switch inverts the input levels of the input ports in the combination pattern allocated thereto when pushed down. The microcomputer (1) detects the state of each push-down switch on the basis of the input levels of the N input ports.

Abstract: It is an object of the present invention to provide a technology that a microcomputer is capable of detecting the states of a large number of switches with a small number of ports. In a microcomputer system according to the present invention, any one of (2N?1) kinds of the combination patterns with respect to the combination of N input ports (IP1 to IP4) of a microcomputer (1) is allocated to each of M push-down switches (SW12, SW13, SW14, SW23, SW24, and SW34) with the different combination from each push-down switch. Each push-down switch inverts the input levels of the input ports in the combination pattern allocated thereto when pushed down. The microcomputer (1) detects the state of each push-down switch on the basis of the input levels of the N input ports.

Abstract: It is an object of the present invention to provide a technology that a microcomputer is capable of detecting the states of a large number of switches with a small number of ports. In a microcomputer system according to the present invention, any one of (2N?1) kinds of the combination patterns with respect to the combination of N input ports (IP1 to IP4) of a microcomputer (1) is allocated to each of M push-down switches (SW12, SW13, SW14, SW23, SW24, and SW34) with the different combination from each push-down switch. Each push-down switch inverts the input levels of the input ports in the combination pattern allocated thereto when pushed down. The microcomputer (1) detects the state of each push-down switch on the basis of the input levels of the N input ports.