Abstract: A three-dimensional memory device includes a first-tier structure located over a substrate and including a first alternating stack of first insulating layers and first electrically conductive layers. a second-tier structure located over the first-tier structure and including a second alternating stack of second insulating layers and second electrically conductive layers, memory stack structures vertically extending through the first alternating stack and the second alternating stack, primary support pillar structures, and auxiliary support pillar structures vertically extending through the first alternating stack, underlying the second stepped surfaces, and located below a horizontal plane including a bottommost surface of the second alternating stack.

Abstract: A three-dimensional memory device includes a first-tier structure located over a substrate and including a first alternating stack of first insulating layers and first electrically conductive layers. a second-tier structure located over the first-tier structure and including a second alternating stack of second insulating layers and second electrically conductive layers, memory stack structures vertically extending through the first alternating stack and the second alternating stack, primary support pillar structures, and auxiliary support pillar structures vertically extending through the first alternating stack, underlying the second stepped surfaces, and located below a horizontal plane including a bottommost surface of the second alternating stack.

Abstract: A method of forming a NAND flash memory includes anisotropically etching trenches of a gate stack down to an intermediate level in a floating gate polysilicon layer, leaving remaining portions of the floating gate polysilicon over the gate dielectric layer. Subsequently, forming a protective layer along exposed sides of the trenches. Then, electrically separating individual floating gates by a selective process that is directed to the remaining portions of the floating gate polysilicon layer exposed by trenches.

Abstract: A method of forming a NAND flash memory includes anisotropically etching trenches of a gate stack down to an intermediate level in a floating gate polysilicon layer, leaving remaining portions of the floating gate polysilicon over the gate dielectric layer. Subsequently, forming a protective layer along exposed sides of the trenches. Then, electrically separating individual floating gates by a selective process that is directed to the remaining portions of the floating gate polysilicon layer exposed by trenches.

Abstract: A method of forming a semiconductor device includes forming a plurality of word lines separated by air gaps with contact pad structures connected to the word lines, and forming a dummy structure directly opposite an air gap between neighboring word lines. Subsequently, the contact pad structures are cut into individual contact pads by a contact pad cut that intersects the dummy structure.

Abstract: A method of forming a semiconductor device includes forming a plurality of word lines separated by air gaps with contact pad structures connected to the word lines, and forming a dummy structure directly opposite an air gap between neighboring word lines. Subsequently, the contact pad structures are cut into individual contact pads by a contact pad cut that intersects the dummy structure.

Abstract: A vacuum processing system of a semiconductor processing substrate and a vacuum processing method using the same comprises an atmospheric transfer chamber having a plurality of cassette stands for transferring a wafer, a lock chamber for storing the wafer transferred from the atmospheric transfer chamber, a first vacuum transfer chamber to which the wafer from the lock chamber is transferred, a transfer intermediate chamber connected to the first vacuum transfer chamber, a second vacuum transfer chamber connected to the transfer intermediate chamber, at least one vacuum processing chamber connected to the first vacuum transfer chamber, and two or more vacuum processing chambers connected to a rear side of the second vacuum transfer chamber, wherein the number of vacuum processing chambers connected to the first vacuum transfer chamber is smaller than the number of vacuum processing chambers connected to the second vacuum transfer chamber, or the number of use of vacuum processing chambers connected to the fir

Abstract: According to one embodiment, a semiconductor device includes a first conductive line and a second conductive line including a first extension region in which the first conductive line and the second conductive line extend in a first direction, and a bend region in which the first conductive line and the second conductive line bend with respect to the first direction, a first dummy pattern and a second dummy pattern arranged on extension regions beyond the bend region of the first conductive line and the second conductive line, respectively, in the first direction, a first contact pad and a second contact pad formed beyond the bend region in the first direction, and connected to the first conductive line and the second conductive line, respectively.

Abstract: A vacuum processing apparatus which includes an atmospheric transfer chamber having a plurality of cassette stands for transferring a wafer, a lock chamber for storing the wafer, a first vacuum transfer chamber to which the wafer from the lock chamber is transferred, a transfer intermediate chamber connected to the first vacuum transfer chamber, and a second vacuum transfer chamber connected to the transfer intermediate chamber. At least one vacuum processing chamber is connected to the first vacuum transfer chamber, and two or more vacuum processing chambers are connected to a rear side of the second vacuum transfer chamber. A plurality of gate valves are disposed between the first vacuum transfer chamber and each of the lock chamber, the transfer intermediate chamber, and the vacuum processing chamber coupled to the first vacuum transfer chamber. A control unit is also provided for controlling operation of the gate valves.

Abstract: According to one embodiment, a semiconductor device includes a first conductive line and a second conductive line including a first extension region in which the first conductive line and the second conductive line extend in a first direction, and a bend region in which the first conductive line and the second conductive line bend with respect to the first direction, a first dummy pattern and a second dummy pattern arranged on extension regions beyond the bend region of the first conductive line and the second conductive line, respectively, in the first direction, a first contact pad and a second contact pad formed beyond the bend region in the first direction, and connected to the first conductive line and the second conductive line, respectively.

Abstract: Technology capable of obtaining logistics routes for optimizing total costs including not only costs regarding transportation and others but also tariffs in performing global design for logistics and cost calculation is provided. The present design for logistics device (100) includes a design for logistics portion (10) that performs processes of calculating costs including tariffs for logistics routes among bases using input data for the design for logistics. Based on the input data, the design for logistics portion (10) forms combinations of logistics routes and combinations of agreements, calculates costs including tariff amounts in accordance with agreements for each of the logistics routes and paths to thereby calculate total costs including tariffs for each of the logistics routes.

Abstract: The invention displays multiple inventory period combinations, as multiple multi-base inventory deployment proposals having assessed values for items such as cash flow and inventory value, each of said assessed values being within a range entered by an inventory deployment decision-maker. For each product included in request information, the invention finds a minimum period (the total lead time from when a given item leaves the applicable warehouse until the item reaches the base that sells the applicable product) and a maximum period (the total lead time needed for all component parts configuring the item to reach the warehouse, added to the minimum period), for each item configuring said product and each warehouse base. The invention computes product-specific inventory period combination information for each warehouse base, and creates inventory period combination information by combining said product-specific inventory period combination information for each product type.

Abstract: A method and apparatus for inspecting defects includes emitting an ultraviolet light from an ultraviolet light source, illuminating a specimen with the ultraviolet light in which a polarization condition of the ultraviolet light is controlled, controlling a polarization condition of light reflected from the specimen which is illuminated by the polarization condition controlled ultraviolet light, detecting the light reflected from the specimen, processing the detected light so as to detect defects, and outputting information about the defects. The ultraviolet light source is disposed in a clean environment supplied with clean gas and separated from outside.

Abstract: A pattern inspection method and apparatus in which a deep ultraviolet light or an ultraviolet light is irradiated onto a specimen on which a pattern is formed, an image of the specimen which is irradiated with the deep ultraviolet light or the ultraviolet light is formed and the formed image is detected with a rear-surface irradiation type image sensor, which is sensitive to wavelengths of no greater than 400 nmm. A signal outputted from the image sensor is processed so as to detect a defect of the specimen by converting an analog image signal outputted from the image sensor to a digital image signal with an A/D converter, and a display displays information of the defect detected.

Abstract: A method and apparatus for inspecting defects includes emitting an ultraviolet light from an ultraviolet light source, illuminating a specimen with the ultraviolet light in which a polarization condition of the ultraviolet light is controlled, controlling a polarization condition of light reflected from the specimen which is illuminated by the polarization condition controlled ultraviolet light, detecting the light reflected from the specimen, processing the detected light so as to detect defects, and outputting information about the defects. The ultraviolet light source is disposed in a clean environment supplied with clean gas and separated from outside.

Abstract: A method and apparatus for inspecting defects includes emitting an ultraviolet light from an ultraviolet light source, illuminating a specimen with the ultraviolet light in which a polarization condition of the ultraviolet light is controlled, controlling a polarization condition of light reflected from the specimen which is illuminated by the polarization condition controlled ultraviolet light, detecting the light reflected from the specimen, processing the detected light so as to detect defects, and outputting information about the defects. The ultraviolet light source is disposed in a clean environment supplied with clean gas and separated from outside.

Abstract: A method and apparatus for inspecting defects includes emitting an ultraviolet light from an ultraviolet light source, illuminating a specimen with the ultraviolet light in which a polarization condition of the ultraviolet light is controlled, controlling a polarization condition of light reflected from the specimen which is illuminated by the polarization condition controlled ultraviolet light, detecting the light reflected from the specimen, processing the detected light so as to detect defects, and outputting information about the defects. The ultraviolet light source is disposed in a clean environment supplied with clean gas and separated from outside.

Abstract: A vacuum processing system of a semiconductor processing substrate and a vacuum processing method using the same comprises an atmospheric transfer chamber having a plurality of cassette stands for transferring a wafer, a lock chamber for storing the wafer transferred from the atmospheric transfer chamber, a first vacuum transfer chamber to which the wafer from the lock chamber is transferred, a transfer intermediate chamber connected to the first vacuum transfer chamber, a second vacuum transfer chamber connected to the transfer intermediate chamber, at least one vacuum processing chamber connected to the first vacuum transfer chamber, and two or more vacuum processing chambers connected to a rear side of the second vacuum transfer chamber, wherein the number of vacuum processing chambers connected to the first vacuum transfer chamber is smaller than the number of vacuum processing chambers connected to the second vacuum transfer chamber, or the number of use of vacuum processing chambers connected to the fir

Abstract: The invention provides a vacuum processing system of a semiconductor processing substrate and a vacuum processing method using the same, comprising an atmospheric transfer chamber having a plurality of cassette stands, a lock chamber arranged on a rear side of the atmospheric transfer chamber, and a first vacuum transfer chamber connected to a rear side of the lock chamber, wherein the first vacuum transfer chamber does not have any vacuum processing chamber connected thereto and has transfer intermediate chambers connected thereto, and the transfer intermediate chambers have subsequent vacuum transfer chambers connected thereto, and wherein the wafers are transferred via the lock chamber to the first vacuum transfer chamber to be processed in each of the subsequent vacuum processing chambers, which are further transferred via any of the transfer intermediate chambers connected to the first vacuum transfer chamber to the subsequent vacuum transfer chambers, and the respective wafers transferred to the subsequ

Abstract: A method and apparatus for inspecting defects includes emitting an ultraviolet light from an ultraviolet light source, illuminating a specimen with the ultraviolet light in which a polarization condition of the ultraviolet light is controlled, controlling a polarization condition of light reflected from the specimen which is illuminated by the polarization condition controlled ultraviolet light, detecting the light reflected from the specimen, processing the detected light so as to detect defects, and outputting information about the defects. The ultraviolet light source is disposed in a clean environment supplied with clean gas and separated from outside.