Abstract: A fuse element of a SCP is reliably fusion-cut with a simple circuit configuration to interrupt an electric current. In a power supply equipped with a battery unit, a control circuit (7) is configured to control turning on and off of a switch (6) configured to connect the SCP (3) which is connected in series to a battery unit (1) and is configured to interrupt charge and discharge currents in an abnormal state. Battery unit 1 includes battery cells (2) connected in series to one another. The SCP (3) includes fuse element 4 connected in series to an output end of the battery unit (1), and a heater (5) configured to fusion-cut the fuse element (4). The switch (6) includes switching elements (10) each of which has one terminal connected to the heater (5) and another terminal connected to a corresponding one of different-voltage terminals (11) of the battery unit 1.

Abstract: A battery pack and a method of diagnosing a failure of an overcurrent detection circuit are provided to diagnosing the overcurrent detection circuit so as to maintain the overcurrent detection circuit in a safe state. A detection signal output from a current detection element connected to an output side of a battery unit is compared with a threshold value. An overcurrent is detected when the detection signal indicates an overcurrent value exceeding the threshold value. In the method, a failure of the overcurrent detection circuit is detected by inputting an overcurrent diagnostic signal to the overcurrent detection circuit.

Abstract: The present disclosure describes a method of controlling a manufacturing system using multivariate time series, the method comprising: recording data from one or more devices in the manufacturing system; storing the recorded data in a data storage as a plurality of time series, wherein each time series has a first recorded value corresponding to a first time and a final recorded value corresponding to an end of the time series; interpolating, within a first time window, missing values in the plurality of time series using a Bayesian model, wherein the missing values fall between the first and end time of the respective time series; storing the interpolated values as prediction data in a prediction storage, wherein the interpolated values include the uncertainty of each interpolated value; loading the recorded data that fall within a second time window from the data storage; loading prediction data from the prediction storage that fall within the second time window and for which no recorded data are available;

Abstract: The present disclosure describes a method of controlling a manufacturing system using multivariate time series, the method comprising: recording data from one or more devices in the manufacturing system; storing the recorded data in a data storage as a plurality of time series, wherein each time series has a first recorded value corresponding to a first time and a final recorded value corresponding to an end of the time series; interpolating, within a first time window, missing values in the plurality of time series using a Bayesian model, wherein the missing values fall between the first and end time of the respective time series; storing the interpolated values as prediction data in a prediction storage, wherein the interpolated values include the uncertainty of each interpolated value; loading the recorded data that fall within a second time window from the data storage; loading prediction data from the prediction storage that fall within the second time window and for which no recorded data are available;

Abstract: A battery pack includes a current detector configured to detect a charging current to secondary battery, a drive circuit configured to drives a charge switch based on the charging current detected by the current detector, a charge controller configured to control operation of the charge switch by the drive circuit, a monitoring unit configured to monitor operation of charge controller, and a judging unit configured to instruct, based on the charge controller and the monitoring unit, the charge switch to be able to or unable to operate.

Abstract: The present disclosure describes a computer-implemented method for detecting anomalies during lot production, wherein the products within a production lot are processed according to a sequence of steps that include manufacturing steps and one or more quality control steps interspersed among the manufacturing steps, the method comprising: obtaining process quality inspection data from each of the one or more quality control steps for a first production lot; obtaining product characteristics data for the products in the first production lot after the final step in the sequence; training a Gaussian process regression model using the process quality inspection data and the product characteristics data from the first production lot; generating a predictive distribution of the product characteristics data using the Gaussian process regression model that uses a bathtub kernel function; obtaining process quality inspection data from each of the quality control steps for a second production lot; identifying anomalies

Abstract: The present disclosure describes a method of controlling a manufacturing system using multivariate time series, the method comprising: recording data from one or more devices in the manufacturing system; storing the recorded data in a data storage as a plurality of time series, wherein each time series has a first recorded value corresponding to a first time and a final recorded value corresponding to an end of the time series; interpolating, within a first time window, missing values in the plurality of time series using a Bayesian model, wherein the missing values fall between the first and end time of the respective time series; storing the interpolated values as prediction data in a prediction storage, wherein the interpolated values include the uncertainty of each interpolated value; loading the recorded data that fall within a second time window from the data storage; loading prediction data from the prediction storage that fall within the second time window and for which no recorded data are available;

Abstract: An alternating stack of insulating layers and spacer material layers is formed over a semiconductor substrate. Memory openings are formed through the alternating stack. An optional silicon-containing epitaxial pedestal and a memory film are formed in each memory opening. After forming an opening through a bottom portion of the memory film within each memory opening, a germanium-containing semiconductor layer and a dielectric layer is formed in each memory opening. Employing the memory film and the dielectric layer as a crucible, a liquid phase epitaxy anneal is performed to convert the germanium-containing semiconductor layer into a germanium-containing epitaxial channel layer. A dielectric core and a drain region can be formed over the dielectric layer. The germanium-containing epitaxial channel layer is single crystalline, and can provide a higher charge carrier mobility than a polysilicon channel.

Abstract: [Problem] To provide a power supply system which effectively utilizes a power storage unit and also limits degradation of the power storage unit. [Solution] A power supply system (1) is provided with: a power storage unit (2) for charging supplied electric power and supplying the charged electric power by means of discharge; and a power storage unit controller (3) for controlling the discharging of the power storage unit (2). The power storage unit controller (3) sets a discharge period during which the power storage unit (2) can be discharged. Furthermore, during the discharge period, the power storage unit controller (3) determines the electric energy to be supplied by means of the discharging of the power storage unit (2) during the remaining discharge period on the basis of the remaining discharge period and the electric energy that can be discharged by the power storage unit (2).

Abstract: An alternating stack of insulating layers and spacer material layers is formed over a semiconductor substrate. Memory openings are formed through the alternating stack. An optional silicon-containing epitaxial pedestal and a memory film are formed in each memory opening. After forming an opening through a bottom portion of the memory film within each memory opening, a germanium-containing semiconductor layer and a dielectric layer is formed in each memory opening. Employing the memory film and the dielectric layer as a crucible, a liquid phase epitaxy anneal is performed to convert the germanium-containing semiconductor layer into a germanium-containing epitaxial channel layer. A dielectric core and a drain region can be formed over the dielectric layer. The germanium-containing epitaxial channel layer is single crystalline, and can provide a higher charge carrier mobility than a polysilicon channel.

Abstract: Undesirable metal contamination from a selective metal deposition process can be minimized or eliminated by employing a first material layer on a bevel and a back side of a substrate, while providing a second material layer only on a front side of the substrate. The first material layer and the second material layer are selected such that a selective deposition process of a metal material provides a metal material portion only on the second material layer, while no deposition occurs on the first material layer or isolated islands of the metal material are formed on the first material layer. Any residual metal material can be removed from the bevel and the back side by a wet etch to reduce or prevent metal contamination from the deposited metal material.

Abstract: There is provided a power supply system in which a user can easily determine an optimum method of consuming power obtained by discharging a power storage portion. The power supply system (1) includes: a power storage portion (11) that supplies a power by discharge; a dischargeable time prediction portion (55) that predicts, when a power is supplied to a predetermined load among a plurality of loads included in the load portion (31), a dischargeable time that is a time period in which the power storage portion (11) can perform discharge; and a notification portion (70) that notifies a user of the dischargeable time predicted by the dischargeable time prediction portion (55). The dischargeable time prediction portion (55) predicts a plurality of dischargeable times in which combinations of loads receiving power supply are different and the notification portion (70) notifies the dischargeable times.

Abstract: An alternating stack of insulating layers and sacrificial material layers is formed over a substrate. After formation of a memory opening, all surfaces of the memory opening are provided as silicon oxide surfaces by formation of at least one silicon oxide portion. A silicon nitride layer is formed in the memory opening. After formation of a memory stack structure, backside recesses can be formed employing the silicon oxide portions as an etch stop. The silicon oxide portions can be subsequently removed employing the silicon nitride layer as an etch stop. Physically exposed portions of the silicon nitride layer can be removed selective to the memory stack structure. Damage to the outer layer of the memory stack structure can be minimized or eliminated by successive use of etch stop structures. Electrically conductive layers can be subsequently formed in the backside recesses.

Abstract: An alternating stack of insulating layers and sacrificial material layers is formed over a substrate. After formation of a memory opening, all surfaces of the memory opening are provided as silicon oxide surfaces by formation of at least one silicon oxide portion. A silicon nitride layer is formed in the memory opening. After formation of a memory stack structure, backside recesses can be formed employing the silicon oxide portions as an etch stop. The silicon oxide portions can be subsequently removed employing the silicon nitride layer as an etch stop. Physically exposed portions of the silicon nitride layer can be removed selective to the memory stack structure. Damage to the outer layer of the memory stack structure can be minimized or eliminated by successive use of etch stop structures. Electrically conductive layers can be subsequently formed in the backside recesses.

Abstract: [Problem] To provide a charging system that levels the amount of grid power that is used, and that is capable of reducing power rates, even if charging has been frequently conducted without limiting the time zones in which charging is conducted. [Solution] A charging system is provided with: a storage unit that is charged by consuming grid power supplied by a power company, and that supplies the stored power through discharge; and a charging unit that charges batteries by consuming power supplied by grid power and the storage unit. Power companies set a power rate that is higher the greater the maximum value of the amount of power supplied for each unit of time is. Furthermore, at least a single charge carried out by the charging unit is carried out over two units of time, and the storage unit supplies power to the charging unit in at least one unit of time other than said two units of time.

Abstract: A power supply system is provided that can reduce the maximum value of the amount of power per unit time supplied to a load and a power storage portion and that can increase the amount of power stored in the power storage portion. The power supply system (1) includes the power storage portion (11) and a charge-discharge control portion (51) that controls the charge and discharge of the power storage portion (11). The power supply system (1) supplies power to an EV charge portion (311) that is one of power storage portions (31). The charge-discharge control portion (51) charges the power storage portion (11) when a power or a current consumed by the EV charge portion (311) is equal to or less than a predetermined magnitude.

Abstract: Disclosed is a power supply device which acquires data of the amount of environmental load material emitted from a power supply, and controls operations on the basis of the data.

Abstract: A stack can be patterned by a first etch process to form an opening defining sidewall surfaces of a patterned material stack. A masking layer can be non-conformally deposited on sidewalls of an upper portion of the patterned material stack, while not being deposited on sidewalls of a lower portion of the patterned material stack. The sidewalls of a lower portion of the opening can be laterally recessed employing a second etch process, which can include an isotropic etch component. The sidewalls of the upper portion of the opening can protrude inward toward the opening to form an overhang over the sidewalls of the lower portion of the opening. The overhang can be employed to form useful structures such as an negative offset profile in a floating gate device or vertically aligned control gate electrodes for vertical memory devices.

Abstract: A stack can be patterned by a first etch process to form an opening defining sidewall surfaces of a patterned material stack. A masking layer can be non-conformally deposited on sidewalls of an upper portion of the patterned material stack, while not being deposited on sidewalls of a lower portion of the patterned material stack. The sidewalls of a lower portion of the opening can be laterally recessed employing a second etch process, which can include an isotropic etch component. The sidewalls of the upper portion of the opening can protrude inward toward the opening to form an overhang over the sidewalls of the lower portion of the opening. The overhang can be employed to form useful structures such as an negative offset profile in a floating gate device or vertically aligned control gate electrodes for vertical memory devices.

Abstract: Non-voltage storage and techniques for fabricating non-volatile storage are disclosed. In some embodiments, at least a portion of the control gates of non-volatile storage elements are formed from p-type polysilicon. In one embodiment, a lower portion of the control gate is p-type polysilicon. The upper portion of the control gate could be p-type polysilicon, n-type polysilicon, metal, metal nitride, etc. P-type polysilicon in the control gate may not deplete even at high Vpgm. Therefore, a number of problems that could occur if the control gate depleted are mitigated. For example, a memory cell having a control gate that is at least partially p-type polysilicon might be programmed with a lower Vpgm than a memory cell formed from n-type polysilicon.