Abstract: One semiconductor device includes a wiring substrate, a semiconductor chip, and a sealing body. The wiring substrate includes an insulating base material, a first conductive pattern formed on one surface of the insulating base material, and a second conductive pattern formed on one surface of the insulating base material, connected to the first conductive pattern and having an end face exposed to the side. The semiconductor chip is mounted on the wiring substrate so as to overlap with the first conductive pattern. The sealing body is formed on the wiring substrate so as to cover the semiconductor chip.

Abstract: One semiconductor device includes a wiring substrate, a semiconductor chip, and a sealing body. The wiring substrate includes an insulating base material, a first conductive pattern formed on one surface of the insulating base material, and a second conductive pattern formed on one surface of the insulating base material, connected to the first conductive pattern and having an end face exposed to the side. The semiconductor chip is mounted on the wiring substrate so as to overlap with the first conductive pattern. The sealing body is formed on the wiring substrate so as to cover the semiconductor chip.

Abstract: One semiconductor device includes a wiring substrate, a semiconductor chip, and a sealing body. The wiring substrate includes an insulating base material, a first conductive pattern formed on one surface of the insulating base material, and a second conductive pattern formed on one surface of the insulating base material, connected to the first conductive pattern and having an end face exposed to the side. The semiconductor chip is mounted on the wiring substrate so as to overlap with the first conductive pattern. The sealing body is formed on the wiring substrate so as to cover the semiconductor chip.

Abstract: One semiconductor device includes a wiring substrate, a semiconductor chip layered on one face of the wiring substrate and having a first face facing the wiring substrate and a second face positioned on a reverse side from the first face, a circuit being formed on at least the second face, a non-circuit-incorporating chip in which a circuit is not formed, the non-circuit-incorporating chip being layered on the second face of the semiconductor chip, and a sealing resin disposed between at least the wiring substrate and the non-circuit-incorporating chip.

Abstract: A semiconductor device includes a wiring substrate, a sealing resin layer formed on the wiring substrate out of a filler-containing resin and having a one-sided filler content ratio, and at least one semiconductor chip mounted on the wiring substrate such that the semiconductor chip is located offset to be closer to an area where the filler content ratio is relatively low in the sealing resin layer and is sealed in its offset location in the sealing resin layer.

Abstract: One semiconductor device includes a wiring board, a semiconductor chip, and an encapsulation body. The wiring board includes an insulating base, a conductive pattern that is formed on one surface of the insulating base, and a heat dissipation via that is connected to the conductive pattern. The heat dissipation via is provided so as to penetrate through the insulating base from one surface to the other surface, while being exposed from the lateral side of the insulating base. The semiconductor chip is mounted on the wiring board so as to overlap the conductive pattern. The encapsulation body is formed on the wiring board so as to cover the semiconductor chip.

Abstract: A semiconductor device includes a wiring board, a first semiconductor chip mounted on the wiring board via a first adhesive member, and second semiconductor chip stacked on the first semiconductor chip via a second adhesive member. The first adhesive member is a die attach film having an adhesive layer formed on both surfaces of an insulating base, and the second adhesive member is an adhesive paste.

Abstract: This semiconductor device (1) comprises a wiring substrate (2), a semiconductor chip (3) and a sealing body (4). The wiring substrate (2) includes an insulating base material (2a), a first conductive pattern (12) formed on one surface of the insulating base material (2a), and a second conductive pattern (13) formed on one surface of the insulating base material (2a), connected to the first conductive pattern (12) and having an end face exposed to the side. The semiconductor chip (3) is mounted on the wiring substrate (2a) so as to overlap with the first conductive pattern (12). The sealing body (4) is formed on the wiring substrate (2a) so as to cover the semiconductor chip (3).

Abstract: One semiconductor device includes a wiring substrate, a semiconductor chip layered on one face of the wiring substrate and having a first face facing the wiring substrate and a second face positioned on a reverse side from the first face, a circuit being formed on at least the second face, a non-circuit-incorporating chip in which a circuit is not formed, the non-circuit-incorporating chip being layered on the second face of the semiconductor chip, and a sealing resin disposed between at least the wiring substrate and the non-circuit-incorporating chip.

Abstract: A semiconductor device includes a wiring substrate, a sealing resin layer formed on the wiring substrate out of a filler-containing resin and having a one-sided filler content ratio, and at least one semiconductor chip mounted on the wiring substrate such that the semiconductor chip is located offset to be closer to an area where the filler content ratio is relatively low in the sealing resin layer and is sealed in its offset location in the sealing resin layer.

Abstract: One semiconductor device includes a circuit board on which multiple connection pads are formed, a first semiconductor chip that is mounted on the circuit board, a second semiconductor chip that is laminated on the first semiconductor chip and has multiple electrodes, reinforcement plates that are laminated on the second semiconductor chip, and multiple wires that electrically connect the multiple connection pads and the multiple electrodes together, wherein the second semiconductor chip has a laminated area that overlaps with the first semiconductor chip and overhang areas that overhang from the first semiconductor chip, the electrodes are formed in the overhang areas, and the reinforcement plates are laminated on the second semiconductor chip so as to straddle the laminated area and the respective overhang areas of the second semiconductor chip.

Abstract: A semiconductor device includes a wiring board, a first semiconductor chip mounted on the wiring board via a first adhesive member, and second semiconductor chip stacked on the first semiconductor chip via a second adhesive member. The first adhesive member is a die attach film having an adhesive layer formed on both surfaces of an insulating base, and the second adhesive member is an adhesive paste.

Abstract: A semiconductor package substrate comprises a substrate core layer, and a land formed on one surface of the substrate core layer for mounting an external electrode terminal thereon. Then, a hole having a diameter smaller than that of the land is dug into the substrate core layer from a position in contact with the land, and the hole is filled with a low modulus resin exhibiting a modulus of elasticity lower than that of a material of the substrate core layer. In this way, the present invention accomplishes a reduction in size of a semiconductor package and improved electrical resistance of a semiconductor package during board level thermal cycle testing.