Abstract: A control device including: a storage device that includes a first storage area including a plurality of blocks into which data can be written more than once and a second storage area into which data can be written only once, wherein the first storage area further stores a flag for each of the blocks, the flag indicating whether or not the block is allowed to be used; a flag management information creation unit configured to create, on the basis of the flag, a flag management information for managing whether or not data can be stored in each block of the storage device; and a management information controller configured to cause the flag management information to be stored in the second storage area.

Abstract: An optical element includes a substrate including protruding structures on the surface and a hard coat layer formed on the substrate. An irregular shape is formed by the structures. An irregular shape resembling the irregular shape of the substrate is formed on a surface of the hard coat layer and is smoother than the that of the substrate. The size of bottoms of the structures changes at random within the range of the minimum distance Rm to the maximum distance RM (Rm: minimum value of the shortest distance from the center of gravity of the bottom of the structure to the rim of the bottom, RM: maximum value of the longest distance from the center of gravity of the bottom of the structure to the rim of the bottom). Neighboring structures have bottoms in contact or substantially in contact with one another. Rm and RM satisfy Rm/RM?0.9.

Abstract: An information processing apparatus includes, a first storage unit, a second storage unit in which data stored in the first storage unit is backed up, and a memory controller that controls data backup operation. The memory controller divides a transfer source storage area into portions, and provides two transfer destination areas, each of the two transfer destination areas being divided into portions, backs up data in a direction from a beginning address of each divided area of the transfer source storage area to an end address thereof in one of the transfer destination areas provided for each divided area of the transfer source storage area, and backs up data in a direction from the end address of each divided area of the transfer source storage area to the beginning address thereof in the other transfer destination storage area.

Abstract: A storage apparatus includes a backup processing unit that stores data stored in a first memory into a second memory as backup data upon occurrence of a power failure, a restore processing unit that upon recovery from the power failure restores the backup data backed up in the second memory to the first memory and erases the backup data, and an erasure processing termination unit that terminates the erasure processing upon a power failure occurring during erasure processing for erasing the backup data stored in the second memory, and a re-backup processing unit that re-backs up data in the first memory corresponding to the backup data erased from the second memory before the erasure processing is terminated by the erasure processing termination unit to a location in the second memory subsequent to a last location that contains the backup data which has not been erased.

Abstract: A non-volatile semiconductor memory device includes: a memory unit including a plurality of memory cells, each of the plurality of memory cells to perform a multi-level storage operation by assigning a value including a plurality of bits to at least four data states defined according to a threshold level; and a controller to control the memory unit, wherein the controller sets at least one of the plurality of bits to an error correction bit that indicates one of a first state and a second state; assigns the first state to the error correction bits that correspond to the data states having a minimum threshold level and a maximum threshold level and the second state to the error correction bits that correspond to the data state having other threshold level; and resets the error correction bit to the first state when the error correction bit indicates the second state.

Abstract: An asynchronous interface circuit for transferring a data stream between different clock domains, the asynchronous interface circuits includes a data holding circuit for sequentially receiving and transferring data of the data stream in synchronism with a first clock signal, and holding the received data until an input of a next data, an asynchronous memory for sequentially receiving the data held in the data holding circuit in synchronism with the first clock signal and for outputting the data in the order of inputting in synchronism with a second clock signal. The asynchronous interface circuit further includes a monitor for detecting an operating state of the asynchronous memory, and a selector for selecting one of the data output from the asynchronous memory and the data output from the data holding circuit on the basis of a detecting result of the monitor.

Abstract: A control apparatus includes a capacitor to store electric power supplied from the power supply unit and to supply the stored electric power to the control apparatus when the power supply from the power supply unit is stopped, a first nonvolatile memory, a second nonvolatile memory, a first controller, and a second controller. The first controller writes the data, stored in the cache memory, into the first nonvolatile memory when the external power supply is stopped verifies whether the data stored in the first nonvolatile memory is normal, and sends information of area where the data in the first nonvolatile memory is not normal when the verification indicates that the writing is not normal. And the second controller writes the information sent from the first controller into the second nonvolatile memory.

Abstract: A circuit system has a first and a second circuit sub-system, and a bidirectional bus, the first circuit sub-system having a first control circuit that receives a control signal for controlling the direction of the bidirectional bus, and controls the first sub-system to be either of a transmitting or a receiving state based on a state of the control signal, a first sending unit that receives the control signal, and outputs as a first control signal, and a second sending unit that receives the control signal, and outputs as a second control signal, the second circuit sub-system having a first receiving unit that receives the first control signal, a second receiving unit that receives the second control signal, and a second control circuit that controls the second sub-system to assume either the transmitting or the receiving state on the basis of the first and the second control signal.

Abstract: An access control apparatus for controlling an access to a storage device, the access control apparatus includes a measuring unit configured to measure the time to erase data stored in the storage device, and a determination unit configured to determine a data size of an error correcting code added to data stored in the storage device in accordance with the time measured by the measuring unit. The access control apparatus includes a generation unit configured to generate the error correcting code having the data size determined by the determination unit, and an access controller configured to write the data and the error correcting code generated by the generation unit into the storage device.

Abstract: A storage apparatus includes a storage medium configured to store data and a control unit configured to control access to the storage medium. The control unit includes first storage configured to store data to be stored in the storage medium, a second storage configured to store data, a control information generator configured to generate control information indicating a storage state of the data in the first storage and a transfer controller configured to control transfer of the data stored in the first storage to the second storage on the basis of the control information generated by the control information generator when the supply of power to the control unit is stopped.

Abstract: A control device including: a storage device that includes a first storage area including a plurality of blocks into which data can be written more than once and a second storage area into which data can be written only once, wherein the first storage area further stores a flag for each of the blocks, the flag indicating whether or not the block is allowed to be used; a flag management information creation unit configured to create, on the basis of the flag, a flag management information for managing whether or not data can be stored in each block of the storage device; and a management information controller configured to cause the flag management information to be stored in the second storage area.

Abstract: In a control apparatus, a write control unit controls operation of writing data to a non-volatile storage unit. The write control unit is configurable with given control data. A control data storage unit stores first control data for the write control unit. An input reception unit receives second control data for the write control unit. A configuration unit configures the write control unit with the first control data stored in the control data storage unit when the first control data has a newer version number than that of the second control data received by the input reception unit, and with the second control data when the second control data has a newer version number than that of the first control data.

Abstract: A storage system including a storage, has a first power supplier for supplying electronic power, a second power supplier for supplying electronic power when the first power supplier not supplying electronic power to the storage system, a cache memory for storing data sent out from a host, a non-volatile memory for storing data stored in the cache memory, and a controller for writing the data stored in the cache memory into the non-volatile memory when the second supplier supplying electronic power to the storage system, for stopping the writing and for deleting data stored in the non-volatile memory so until a free space volume of the non-volatile memory being not less than a volume of the data stored in the cache memory when the first supplier restoring electronic power to the storage system.

Abstract: A storage apparatus includes a backup processing unit that stores data stored in a first memory into a second memory as backup data upon occurrence of a power failure, a restore processing unit that upon recovery from the power failure restores the backup data backed up in the second memory to the first memory and erases the backup data, and an erasure processing termination unit that terminates the erasure processing upon a power failure occurring during erasure processing for erasing the backup data stored in the second memory, and a re-backup processing unit that re-backs up data in the first memory corresponding to the backup data erased from the second memory before the erasure processing is terminated by the erasure processing termination unit to a location in the second memory subsequent to a last location that contains the backup data which has not been erased.

Abstract: An asynchronous interface circuit for transferring a data stream between different clock domains, the asynchronous interface circuits includes a data holding circuit for sequentially receiving and transferring data of the data stream in synchronism with a first clock signal, and holding the received data until an input of a next data, an asynchronous memory for sequentially receiving the data held in the data holding circuit in synchronism with the first clock signal and for outputting the data in the order of inputting in synchronism with a second clock signal. The asynchronous interface circuit further includes a monitor for detecting an operating state of the asynchronous memory, and a selector for selecting one of the data output from the asynchronous memory and the data output from the data holding circuit on the basis of a detecting result of the monitor.

Abstract: An information processing apparatus includes, a first storage unit, a second storage unit in which data stored in the first storage unit is backed up, and a memory controller that controls data backup operation. The memory controller divides a transfer source storage area into portions, and provides two transfer destination areas, each of the two transfer destination areas being divided into portions, backs up data in a direction from a beginning address of each divided area of the transfer source storage area to an end address thereof in one of the transfer destination areas provided for each divided area of the transfer source storage area, and backs up data in a direction from the end address of each divided area of the transfer source storage area to the beginning address thereof in the other transfer destination storage area.

Abstract: Disclosed are pyrazole-1-carboxylate derivatives of the general formula (1), (wherein symbols are as defined in the specification), a process for the production thereof and processes for producing herbicidally active 3-aryloxypyrazole-1-carboxamide derivatives from the above compound and an intermediate therefor. According to this invention, there can be industrially advantageously produced 3-aryloxypyrazole-1-carboxamide derivatives that does not cause chemical damage on crops but exhibits excellent herbicidal activity against weeds that impair the growth of such crops.

Abstract: An optical element includes a substrate including protruding structures on the surface and a hard coat layer formed on the substrate. An irregular shape is formed by the structures. An irregular shape resembling the irregular shape of the substrate is formed on a surface of the hard coat layer and is smoother than the that of the substrate. The size of bottoms of the structures changes at random within the range of the minimum distance Rm to the maximum distance RM (Rm: minimum value of the shortest distance from the center of gravity of the bottom of the structure to the rim of the bottom, RM: maximum value of the longest distance from the center of gravity of the bottom of the structure to the rim of the bottom). Neighboring structures have bottoms in contact or substantially in contact with one another. Rm and RM satisfy Rm/RM?0.9.

Abstract: A circuit system has a first and a second circuit sub-system, and a bidirectional bus, the first circuit sub-system having a first control circuit that receives a control signal for controlling the direction of the bidirectional bus, and controls the first sub-system to be either of a transmitting or a receiving state based on a state of the control signal, a first sending unit that receives the control signal, and outputs as a first control signal, and a second sending unit that receives the control signal, and outputs as a second control signal, the second circuit sub-system having a first receiving unit that receives the first control signal, a second receiving unit that receives the second control signal, and a second control circuit that controls the second sub-system to assume either the transmitting or the receiving state on the basis of the first and the second control signal.

Abstract: The present invention provides a pyrazole derivative of the general formula (1), which has an excellent efficacy as an active component for a herbicide, an intermediate for the production thereof, processes for the production thereof, and a herbicide containing the derivative as an active ingredient.