Abstract: an image processing circuit includes a memory storing an image data, which includes a plurality of line data disposed regularly a first module performing a plurality of thinning processes, at each of which a plurality of line data are readout from the memory, and at each of which one line data is processed by using the readout line data, wherein the processed line data is restored in the memory, and wherein the first image processing module outputs a first signal after the thinning processes for a certain times are completed, and a second module, which start its operation in response to the first completion signal, performing a similar image-process performed by the first module, wherein the second image processing module outputs a second completion signal after the thinning processes for the entire image data stored in the memory are completed.

Abstract: A location predicting unit predicts a composing location based on the composing locations corresponding to partial images of one-frame-before and two-frames-before the current partial image on an assumption that the above partial image moves at a constant speed, and gives the above predicted value to a combining unit as an initial value. The combining unit moves locations of the current partial image and the one-frame-before partial image pixel by pixel in a predetermined direction starting from the initial value and combines the above partial images each other. A picture element comparing unit and a location determining unit calculate the cumulative value of the brightness differentials between picture elements of the current partial image and the one-frame-before partial image in the overlapped part with respect to each of the combining locations.

Abstract: A memory controller includes a plurality of buffers and a controller. The buffers are connected with a predetermined memory. The controller issues a first command before all the buffers store data. The first command is an instruction to activate a row address corresponding to a predetermined memory region in the predetermined memory, and it is generated based on a write command input from an external unit. The write command is an instruction to activate a write data to the predetermined memory.