Patents by Inventor Atsuyuki Hoshino

Atsuyuki Hoshino has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10480736
    Abstract: A daylighting system (10) to be installed over an interior face (1001a) of a window pane (1001), the daylighting system (10) including: a light-transmitting device (20) to be disposed over an upper part of the interior face (1001a) of the window pane (1001); and a shading device (30) joined to the light-transmitting device (20) in such a manner as to be disposed over a lower part of the interior face (1001a) of the window pane (1001).
    Type: Grant
    Filed: April 26, 2016
    Date of Patent: November 19, 2019
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Shumpei Nishinaka, Shun Ueki, Toru Kanno, Daisuke Shinozaki, Hideomi Yui, Tomoko Ueki, Tsuyoshi Kamada, Atsuyuki Hoshino
  • Publication number: 20180128441
    Abstract: A daylighting system (10) to be installed over an interior face (1001a) of a window pane (1001), the daylighting system (10) including: a light-transmitting device (20) to be disposed over an upper part of the interior face (1001a) of the window pane (1001); and a shading device (30) joined to the light-transmitting device (20) in such a manner as to be disposed over a lower part of the interior face (1001a) of the window pane (1001).
    Type: Application
    Filed: April 26, 2016
    Publication date: May 10, 2018
    Inventors: SHUMPEI NISHINAKA, SHUN UEKI, TORU KANNO, DAISUKE SHINOZAKI, HIDEOMI YUI, TOMOKO UEKI, TSUYOSHI KAMADA, ATSUYUKI HOSHINO
  • Publication number: 20130264568
    Abstract: A purpose of the present invention is to provide: a semiconductor device where light-induced deterioration of characteristics of oxide semiconductor TFT is prevented without lowering the aperture ratio of pixels; a display device including such a semiconductor device; a color filter substrate; and a method for manufacturing such a semiconductor device. A semiconductor device (100A) of the present invention includes: a substrate (2); a thin film transistor (10) formed on the substrate (2); a light-absorbing film (15) that is formed on the thin film transistor (10) and that absorbs light having wavelengths of less than 450 nm; and a pixel electrode (17) connected to the thin film transistor (10). The thin film transistor (10) includes an oxide semiconductor layer (8). The light-absorbing film (15) is formed of an oxide containing In, Ga, or Zn. The light-absorbing film (15) is formed to overlap the thin film transistor (10) when viewed from normal direction to the semiconductor device (100A).
    Type: Application
    Filed: December 19, 2011
    Publication date: October 10, 2013
    Applicant: SHARP KABUSHIKI KAISHA
    Inventors: Masahiro Tomida, Atsuyuki Hoshino
  • Publication number: 20130026574
    Abstract: In an inverted staggered type TFT (100), contact layers (150a and 150b) that electrically connect a channel layer (140) to source and drain electrodes (160a and 160b), respectively, include n+ amorphous silicon layers (151a and 151b), n+ microcrystalline silicon layers (152a and 152b), and n+ microcrystalline silicon layers (153a and 153b). The n+ microcrystalline silicon layers (152a and 152b) have a lower crystallization rate than the n+ microcrystalline silicon layers (153a and 153b) and are formed between the n+ amorphous silicon layers (151a and 151b) and the n+ microcrystalline silicon layers (153a and 153b). In this case, since the film thickness of incubation layers formed on surfaces of the n+ amorphous silicon layers (151a and 151b) decreases, the resistance value of the contact layers (150a and 150b) decreases. By this, the contact resistance of the TFT (100) decreases and the mobility can be increased.
    Type: Application
    Filed: January 25, 2011
    Publication date: January 31, 2013
    Inventors: Kenji Nakanishi, Masao Moriguchi, Atsuyuki Hoshino
  • Publication number: 20120049193
    Abstract: A semiconductor device 100 according to the present invention includes a TFT 120 and a TFT 140. The TFT 120 has a gate electrode 122, a semiconductor layer 130 including a microcrystalline semiconductor film 132, and a gate insulating layer 124 provided between the gate electrode 122 and the semiconductor layer 130. The TFT 140 has a gate electrode 142, a semiconductor layer 150 including a microcrystalline semiconductor film 152, and a gate insulating layer 144 provided between the gate electrode 142 and the semiconductor layer 150. The thickness and layer structure of the semiconductor layer 150 of the TFT 140 are different from those of the semiconductor layer 130 of the TFT 120.
    Type: Application
    Filed: February 2, 2010
    Publication date: March 1, 2012
    Applicant: SHARP KABUSHIKI KAISHA
    Inventors: Yuichi Saito, Masao Moriguchi, Atsuyuki Hoshino, Tokuo Yoshida
  • Publication number: 20120007843
    Abstract: The present invention provides a TFT substrate capable of accurately maintaining potentials of pixels on the TFT substrate. The TFT substrate includes gate bus lines (G2, G3), auxiliary capacitor bus lines (CsYH3, CsYL2), an auxiliary capacitor bus line (CsXH1) made of the same wiring layer as the gate bus lines (G2, G3) and forming an auxiliary capacitor (22) for a first sub-pixel (SP21), and an auxiliary capacitor bus line (CsXL2) made of the same wiring layer as the gate bus lines (G2, G3) and forming an auxiliary capacitor (25) for a second sub-pixel (SP22). The auxiliary capacitor bus line (CsYH3) is connected with the auxiliary capacitor bus line (CsXH1), and the auxiliary capacitor bus line (CsYL2) is connected with the auxiliary capacitor bus line (CsXL2), via connection wiring portions made of wiring layers different from the gate bus lines (G2, G3).
    Type: Application
    Filed: November 5, 2009
    Publication date: January 12, 2012
    Applicant: SHARP KABUSHIKI KAISHA
    Inventor: Atsuyuki Hoshino
  • Patent number: 7956363
    Abstract: The present invention relates to a substrate for a liquid crystal display device and a liquid crystal display device having the substrate, an object of the invention is to provide such a substrate for a display device that can be obtained by a simple production method with high reliability, and a liquid crystal display device having the same. A substrate for a display device contains: an accumulated electrode having an accumulated structure containing a lower layer formed on a substrate, and a upper layer containing ZnO and formed on the lower layer; an insulating film covering the accumulated electrode; a contact hole opening in the insulating film on the accumulated electrode; and a pixel electrode formed on the insulating film and being connected directly to the upper layer of the accumulated electrode through the contact hole.
    Type: Grant
    Filed: May 25, 2006
    Date of Patent: June 7, 2011
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Atsuyuki Hoshino, Katsunori Misaki, Akihiro Matsui, Hideya Hashii
  • Patent number: 7692740
    Abstract: The invention relates to a substrate for a liquid crystal display used in a display section of an information apparatus, a liquid crystal display having the same, and a method of manufacturing the same. There is provided a substrate for a liquid crystal display which achieves good display quality with reduced manufacturing steps, a liquid crystal display having the same, and a method of manufacturing the same. TFTs are formed on a glass substrate. A protective film is formed on the TFTs, and a resist pattern is formed on the protective film, the resist pattern having openings located above source electrodes, gate bus line terminals, and drain bus line terminals. The resist pattern is baked at a baking temperature of 200 (or more after irradiating the surface thereof with ultraviolet light to form a wrinkled resin layer having a wrinkled surface.
    Type: Grant
    Filed: February 23, 2005
    Date of Patent: April 6, 2010
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Seiji Doi, Tetsuya Fujikawa, Naoshige Itami, Yoshinori Tanaka, Atsuyuki Hoshino, Yoshio Kurosawa
  • Patent number: 7615782
    Abstract: The present invention relates to a thin film transistor substrate and a liquid crystal display panel for use in a liquid crystal display apparatus, and aims to provide a thin film transistor substrate and a liquid crystal display panel with good display quality. The thin film transistor substrate has a first sub-pixel electrode 16 and second sub-pixel electrode 17 arranged on the opposite sides of the gate bus line 12, a first thin film transistor 20a that establishes direct electrical connection with the first sub-pixel electrode 16, and a second thin film transistor 20b capacitively coupled to the second sub-pixel electrode 17. Since capacitance is formed where conventionally a source electrode and pixel electrode are connected via a contact hole, excessively opaque wiring is not required, which ensures sufficient effective area and transmittance of a pixel.
    Type: Grant
    Filed: May 15, 2006
    Date of Patent: November 10, 2009
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Atsuyuki Hoshino
  • Publication number: 20070091240
    Abstract: A liquid crystal display is disclosed that includes a first substrate having a reflective layer; a second substrate having multiple pixels formed thereon, the pixels each having a color filter layer; and a liquid crystal layer sandwiched between the first and second substrates with a predetermined distance between the first and second substrates. Each of the pixels includes a reflective part to reflect light entering from the second substrate side by the reflective layer and a transmissive part to transmit light from the side of the first substrate facing away from the second substrate. An alignment control projection to control the alignment of liquid crystal molecules is provided in the reflective part of each of the pixels. The alignment control projection in the reflective part functions as a spacer to control the predetermined distance between the first and second substrates in at least one of the pixels.
    Type: Application
    Filed: May 26, 2006
    Publication date: April 26, 2007
    Applicant: Sharp Kabushiki Kaisha
    Inventors: Tomonori Tanose, Atsuyuki Hoshino
  • Publication number: 20070090361
    Abstract: The present invention relates to a thin film transistor substrate and a liquid crystal display panel for use in a liquid crystal display apparatus, and aims to provide a thin film transistor substrate and a liquid crystal display panel with good display quality. The thin film transistor substrate has a first sub-pixel electrode 16 and second sub-pixel electrode 17 arranged on the opposite sides of the gate bus line 12, a first thin film transistor 20a that establishes direct electrical connection with the first sub-pixel electrode 16, and a second thin film transistor 20b capacitively coupled to the second sub-pixel electrode 17. Since capacitance is formed where conventionally a source electrode and pixel electrode are connected via a contact hole, excessively opaque wiring is not required, which ensures sufficient effective area and transmittance of a pixel.
    Type: Application
    Filed: May 15, 2006
    Publication date: April 26, 2007
    Applicant: Sharp Kabushiki Kaisha
    Inventor: Atsuyuki Hoshino
  • Publication number: 20070080349
    Abstract: The present invention relates to a substrate for a liquid crystal display device and a liquid crystal display device having the substrate, an object of the invention is to provide such a substrate for a display device that can be obtained by a simple production method with high reliability, and a liquid crystal display device having the same. A substrate for a display device contains: an accumulated electrode having an accumulated structure containing a lower layer formed on a substrate, and a upper layer containing ZnO and formed on the lower layer; an insulating film covering the accumulated electrode; a contact hole opening in the insulating film on the accumulated electrode; and a pixel electrode formed on the insulating film and being connected directly to the upper layer of the accumulated electrode through the contact hole.
    Type: Application
    Filed: May 25, 2006
    Publication date: April 12, 2007
    Applicant: Sharp Kabushiki Kaisha
    Inventors: Atsuyuki Hoshino, Katsunori Misaki, Akihiro Matsui, Hideya Hashii
  • Publication number: 20050248700
    Abstract: The invention relates to a liquid crystal display used in a display section of an electronic apparatus and a liquid crystal display substrate used for the same and provides a liquid crystal display that can be manufactured through simplified manufacturing processes and that can provide high display quality and a liquid crystal display substrate used for the same. A configuration is employed which includes gate bus lines and drain bus lines formed on a substrate such that they intersect each other with an insulation film interposed therebetween and pixel electrodes provided so as to cover at least one of the gate bus lines and the drain bus lines with a dielectric layer interposed therebetween and forming parasitic capacities between the gate bus lines or drain bus lines and themselves.
    Type: Application
    Filed: August 29, 2003
    Publication date: November 10, 2005
    Inventors: Takashi Takagi, Atsuyuki Hoshino, Manabu Sawasaki, Takuya Saguchi
  • Publication number: 20050157237
    Abstract: The invention relates to a substrate for a liquid crystal display used in a display section of an information apparatus, a liquid crystal display having the same, and a method of manufacturing the same. There is provided a substrate for a liquid crystal display which achieves good display quality with reduced manufacturing steps, a liquid crystal display having the same, and a method of manufacturing the same. TFTs are formed on a glass substrate. A protective film is formed on the TFTs, and a resist pattern is formed on the protective film, the resist pattern having openings located above source electrodes, gate bus line terminals, and drain bus line terminals. The resist pattern is baked at a baking temperature of 200 (or more after irradiating the surface thereof with ultraviolet light to form a wrinkled resin layer having a wrinkled surface.
    Type: Application
    Filed: February 23, 2005
    Publication date: July 21, 2005
    Inventors: Seiji Doi, Tetsuya Fujikawa, Naoshige Itami, Yoshinori Tanaka, Atsuyuki Hoshino, Yoshio Kurosawa
  • Publication number: 20040001174
    Abstract: The invention relates to a substrate for a liquid crystal display used in a display section of an information apparatus, a liquid crystal display having the same, and a method of manufacturing the same. There is provided a substrate for a liquid crystal display which achieves good display quality with reduced manufacturing steps, a liquid crystal display having the same, and a method of manufacturing the same. TFTs are formed on a glass substrate. A protective film is formed on the TFTs, and a resist pattern is formed on the protective film, the resist pattern having openings located above source electrodes, gate bus line terminals, and drain bus line terminals. The resist pattern is baked at a baking temperature of 200° or more after irradiating the surface thereof with ultraviolet light to form a wrinkled resin layer having a wrinkled surface.
    Type: Application
    Filed: May 29, 2003
    Publication date: January 1, 2004
    Applicant: Fujitsu Display Technologies Corporation
    Inventors: Seiji Doi, Tetsuya Fujikawa, Naoshige Itami, Yoshinori Tanaka, Atsuyuki Hoshino, Yoshio Kurosawa