Abstract: A system and method for predicting the ratio of the strength of the carrier signal to the strength of nonlinear distortion (C/NLD) generated by a communications laser is disclosed. The method jointly evaluates the individual distortion components arising from laser clipping and from inherent laser P-I nonlinearity. According to the method, the laser P-I curve is measured with high precision to quantify the P-I nonlinearity. Various derivatives of the P-I curve are determined and then utilized to calculate C/NLD as a function of a communications network parameter such as the optical modulation index per channel or rms modulation index. Based on this information, the laser can be identified in terms of its sensitivity to RF drive variations in the field. Lasers can be tagged, etc., depending on their C/NLD sensitivity. In this manner, a laser having a C/NLD ratio appropriate for the requirements of a broadband transmission network, such as a SCM CATV system, can be selected and installed in such a system.

Abstract: A balanced driver circuit which essentially eliminates inductive noise without a power dissipation penalty is disclosed. The balanced driver circuit is similar to a conventional balanced driver circuit however the circuit is impedance matched at both ends and has resistors connected in series with the outputs of the emitter followers in the chip. The resistors are equal in value to a termination resistor less the output impedance of the emitter followers. The impedance between the pair of signal leads, referred to as the primary and secondary leads is equal to the sum of the termination resistors. The current traversing the secondary lead has the same amplitude, but the opposite sign as the current traversing the primary lead. Thus, there is negligible current return through the common ground leads.

Abstract: A tool for designing the conductors into a PWB includes an audit arrangement for auditing or analyzing crosstalk between electrical conductors to be entered into the PWB. This crosstalk audit may be performed as soon as the initial design is created and before actual manufacture of the PWB. It is operative to identify crosstalk problem areas and to identify impedance mismatches. In particular the audit process defines conduction paths into conduction nets conduction nets are selected one at a time for evaluation and simulated as having an idle current condition. Nearby conduction nets are simulated as being driven in an active condition. The response of the idle network is used to derive a plurality of crosstalk parameters which are used to determine the crosstalk effect on the net under test.

Abstract: Ground noise associated with lead inductance in electronic systems containing multiple lead integrated circuits is substantially reduced by including, for each chip driver lead that carries a signal, a complementary lead which carries the the inverse of that signal. These balanced pairs are continued not only in the wire bonds and lead frame of the integrated circuit, but also through any connecting assembly such as a printed wiring board or multichip module to the associated balanced chip receivers.

Abstract: By on-chip modification of a conventional balanced driver to yield special voltage levels, the power dissipation of a balanced, terminated transmission line circuit can be reduced by 50% or more relative to a conventional balanced driver or 25% or more relative to a conventional unbalanced driver. This reduction in power dissipation not only applies to point-to-point interconnections but also applies to bused interconnections. The low power balanced driver circuit can be implemented using ECL, BiCMOS, GaAs and CMOS technologies and no modifications are needed to the associated differential line receiver. Thus, the significant benefits of balanced interconnections, namely reduced crosstalk, increased noise immunity, and elimination of ground noise can be realized with a significant reduction in power dissipation.

Abstract: A high-speed, high pin-out chip carrier package (10) for interconnecting at least one LSI or VLSI chip to a circuit pack is disclosed. The package includes a ground plane (19), a power plane (20), and at least one signal layer (15, 16, 17, 18) containing plural conductors therethrough. Layers (85) of dielectric material separate adjacent conductive layers, (15, 16, 17, 18, 19, 20). By controlling, in design, the width of each signal conductor and its distance to the nearest ground (19) or power plane (20), the package is impedance-matched to the circuit pack. Plural plated-through holes (21) are disposed through the package for electrically interconnecting the signal conductors, the ground plane (19), and the power plane (20) to the circuit pack, and are arranged in a pattern to reduce inductive noise.

Abstract: A method is disclosed for improving the transmission properties of balanced and unbalanced connectorized flat cable interconnection assemblies. In accordance with the method, a first set of generally parallel flat cable conductors are terminated on a first mapped set of connector contacts such that all conductors are connectable to a source of ground potential. A second set of generally parallel flat cable conductors are terminated on a second mapped set of connector contacts such that the odd-numbered conductors are connectable to a source of ground potential and the even-numbered conductors are connectable to a plurality of signal sources. The termination of flat cable conductors in accordance with this method also results in an improvement in the packaging density of pluggably interconnectable circuits.