Patents by Inventor Atul A. Khare

Atul A. Khare has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10572395
    Abstract: A processing system includes an execution unit comprising a logic circuit to implement an architecturally-protected execution environment associated with a protected region in a memory, in which the execution unit is to execute application code stored in the protected region as a thread running in the architecturally-protected execution environment, determine that an access mode flag is set to a first value, detect an attempt by the thread to access data stored outside the protected region, and responsive to detecting the attempt and determining that the access mode flag is set to the first value, generate an exception.
    Type: Grant
    Filed: September 7, 2016
    Date of Patent: February 25, 2020
    Assignee: Intel Corporation
    Inventors: Volodymyr Pikhur, Atul A. Khare
  • Patent number: 10114952
    Abstract: In one embodiment, a system includes: a processor; a security processor to execute in a trusted executed environment (TEE), the security processor to execute memory reference code (MRC) stored in a secure storage of the TEE to train a memory coupled to the processor; and the memory coupled to the processor. Other embodiments are described and claimed.
    Type: Grant
    Filed: March 30, 2016
    Date of Patent: October 30, 2018
    Assignee: MCAFEE, LLC
    Inventors: Atul A. Khare, Karunakara Kotary, Rajesh Poornachandran, Vincent J. Zimmer, Sudeep Das
  • Publication number: 20180181762
    Abstract: Techniques and computing devices for persistent firmware transfer monitoring and, more specifically, but not exclusively, to a resource filter within a firmware resource monitor configured to persistently store resource information after a boot operation. In one embodiment, for example, an apparatus for persistent firmware transfer monitoring in a computer system comprises at least one memory, at least one processor, and a resource filter comprising logic, at least a portion of the logic comprised in hardware and executed by the processor. The logic to may be configured to receive a list of required resources during a boot operation and receive a list of excluded resources. The resource filter may be further configured to persistently store the list of required resources and the list of excluded resources after the boot operation has completed.
    Type: Application
    Filed: December 28, 2016
    Publication date: June 28, 2018
    Applicant: INTEL CORPORATION
    Inventors: RAJESH POORNACHANDRAN, NED M. SMITH, VINCENT J. ZIMMER, ATUL A. KHARE, KARUNAKARA KOTARY
  • Publication number: 20180067873
    Abstract: A processing system includes an execution unit comprising a logic circuit to implement an architecturally-protected execution environment associated with a protected region in a memory, in which the execution unit is to execute application code stored in the protected region as a thread running in the architecturally-protected execution environment, determine that an access mode flag is set to a first value, detect an attempt by the thread to access data stored outside the protected region, and responsive to detecting the attempt and determining that the access mode flag is set to the first value, generate an exception.
    Type: Application
    Filed: September 7, 2016
    Publication date: March 8, 2018
    Inventors: Volodymyr Pikhur, Atul A. Khare
  • Publication number: 20170286679
    Abstract: In one embodiment, a system includes: a processor; a security processor to execute in a trusted executed environment (TEE), the security processor to execute memory reference code (MRC) stored in a secure storage of the TEE to train a memory coupled to the processor; and the memory coupled to the processor. Other embodiments are described and claimed.
    Type: Application
    Filed: March 30, 2016
    Publication date: October 5, 2017
    Inventors: Atul A. Khare, Karunakara Kotary, Rajesh Poornachandran, Vincent J. Zimmer, Sudeep Das
  • Publication number: 20160092227
    Abstract: Robust system call and system return instructions are executed by a processor to transfer control between a requester and an operating system kernel. The processor includes execution circuitry and registers that store pointers to data structures in memory. The execution circuitry receives a system call instruction from a requester to transfer control from a first privilege level of the requester to a second privilege level of an operating system kernel. In response, the execution circuitry swaps the data structures that are pointed to by the registers between the requester and the operating system kernel in one atomic transition.
    Type: Application
    Filed: December 8, 2015
    Publication date: March 31, 2016
    Inventors: Baiju V. Patel, James B. Crossland, Atul A. Khare, Toby Opferman
  • Patent number: 9239801
    Abstract: An example processing system may comprise: a lower stack bound register configured to store a first memory address, the first memory address identifying a lower bound of a memory addressable via a stack segment; an upper stack bound register configured to store a second memory address, the second memory address identifying an upper bound of the memory addressable via the stack segment; and a stack bounds checking logic configured to detect unauthorized stack pivoting, by comparing a memory address being accessed via the stack segment with at least one of the first memory address and the second memory address.
    Type: Grant
    Filed: June 5, 2013
    Date of Patent: January 19, 2016
    Assignee: Intel Corporation
    Inventors: Baiju V. Patel, Xiaoning Li, H P. Anvin, Asit K. Mallick, Gilbert Neiger, James B. Crossland, Toby Opferman, Atul A. Khare, Jason W. Brandt, James S. Coke, Brian L. Vajda
  • Patent number: 9207940
    Abstract: Robust system call and system return instructions are executed by a processor to transfer control between a requester and an operating system kernel. The processor includes execution circuitry and registers that store pointers to data structures in memory. The execution circuitry receives a system call instruction from a requester to transfer control from a first privilege level of the requester to a second privilege level of an operating system kernel. In response, the execution circuitry swaps the data structures that are pointed to by the registers between the requester and the operating system kernel in one atomic transition.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: December 8, 2015
    Assignee: Intel Corporation
    Inventors: Baiju V. Patel, James B. Crossland, Atul A. Khare, Toby Opferman
  • Publication number: 20140365742
    Abstract: An example processing system may comprise: a lower stack bound register configured to store a first memory address, the first memory address identifying a lower bound of a memory addressable via a stack segment; an upper stack bound register configured to store a second memory address, the second memory address identifying an upper bound of the memory addressable via the stack segment; and a stack bounds checking logic configured to detect unauthorized stack pivoting, by comparing a memory address being accessed via the stack segment with at least one of the first memory address and the second memory address.
    Type: Application
    Filed: June 5, 2013
    Publication date: December 11, 2014
    Inventors: BAIJU V. PATEL, XIAONING LI, H P. ANVIN, ASIT K. MALLICK, GILBERT NEIGER, JAMES B. CROSSLAND, TOBY OPFERMAN, ATUL A. KHARE, JASON W. BRANDT, JAMES S. COKE, BRIAN L. VAJDA
  • Publication number: 20140281437
    Abstract: Robust system call and system return instructions are executed by a processor to transfer control between a requester and an operating system kernel. The processor includes execution circuitry and registers that store pointers to data structures in memory. The execution circuitry receives a system call instruction from a requester to transfer control from a first privilege level of the requester to a second privilege level of an operating system kernel. In response, the execution circuitry swaps the data structures that are pointed to by the registers between the requester and the operating system kernel in one atomic transition.
    Type: Application
    Filed: March 15, 2013
    Publication date: September 18, 2014
    Inventors: Baiju V. Patel, James B. Crossland, Atul A. Khare, Toby Opferman