Patents by Inventor Atul DWIVEDI

Atul DWIVEDI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250251750
    Abstract: A circuit and method for generating a PVT invariant reference voltage are provided. The example circuit includes a reference BJT, wherein a ratio of a collector current at the collector terminal and a base current at the base terminal is equal to a beta value. The example circuit further includes a resistive element having a first terminal and a second terminal, the second terminal electrically coupled to the emitter terminal of the reference BJT. A reference voltage is generated by the example circuit based on a voltage difference between the first terminal of the resistive element and the base of the reference BJT. The example circuit further includes a beta-compensated current generation circuit configured to generate a beta-compensated current, based on a PTAT current, at the emitter terminal of the reference BJT, wherein the beta-compensated current is inversely proportional to the beta value of the reference BJT.
    Type: Application
    Filed: January 25, 2025
    Publication date: August 7, 2025
    Inventors: Atul DWIVEDI, Pradeep Kumar BADRATHWAL
  • Patent number: 12209919
    Abstract: A method for determining temperature of a chip, includes generating a first voltage and a second voltage using a pair of bipolar-junction transistors, and generating a third voltage using another bipolar-junction transistor. When a most recent bit of a bitstream is a logic-zero, the difference between the first and second voltages is sampled using a switched-capacitor input-sampling circuit, and a difference between the first and second voltages is integrated, to produce a proportional-to-absolute-temperature voltage. The proportional-to-absolute-temperature voltage is quantized to produce a next bit of the bitstream. When the most recent bit of the bitstream is a logic-one, the third voltage is sampled using the switched-capacitor input-sampling circuit, and the third voltage is integrated, to produce a complementary-to-absolute-temperature voltage. The complementary-to-absolute-temperature voltage is quantized to produce a next bit of the bitstream.
    Type: Grant
    Filed: January 8, 2024
    Date of Patent: January 28, 2025
    Assignee: STMicroelectronics International N.V.
    Inventors: Pijush Kanti Panja, Kallol Chatterjee, Atul Dwivedi
  • Publication number: 20250015795
    Abstract: An integrated circuit comprises a current source, a plurality of parallel transistors, a plurality of switches, switch control circuitry, and measurement circuitry. Each switch selectively couples the current source to a corresponding transistor. The switch control circuitry is configured to, at different times, cause all the switches to close and, separately for each transistor, cause the switch associated with each transistor to close while causing all other switches to open. The measurement circuitry is configured to measure, separately for each of the transistors, a base-emitter voltage (VBE) when all the switches are closed and a VBE when only the switch associated with each transistor is closed, determine a ?VBE for each of the plurality of transistors by calculating a difference between the VBE when only the switch associated with each transistor is closed and the VBE when all the switches are closed, and calculate an average of all the ?VBEs.
    Type: Application
    Filed: June 21, 2024
    Publication date: January 9, 2025
    Inventor: Atul DWIVEDI
  • Publication number: 20250013257
    Abstract: An integrated circuit comprises a current source, a plurality of transistors arranged in parallel, a plurality of resistors, a plurality of switches, switch control circuitry, and measurement circuitry. Each resistor is coupled with the emitter of a respective transistor. Each switch selectively couples the current source to a respective resistor such that a bias current flows from the current source to the emitter of a respective transistor when a respective switch is closed. The measurement circuitry is coupled to the first transistor between its emitter and a respective resistor. The measurement circuitry is configured to separately measure a base-emitter voltage (VBE1) of the first transistor when all of the switches are closed and a base-emitter voltage (VBE2) of the first transistor when only the switch associated with the first transistor is closed and to determine a ?VBE by calculating a difference between VBE2 and VBE 1.
    Type: Application
    Filed: June 21, 2024
    Publication date: January 9, 2025
    Inventor: Atul DWIVEDI
  • Publication number: 20240175762
    Abstract: A method includes generating a voltage proportional to absolute temperature, generating an uncorrected voltage complementary to absolute temperature, and generating a correction voltage. The method further includes selectively sampling the voltage proportional to absolute temperature, the uncorrected voltage complementary to absolute temperature, and the correction voltage, providing those sampled voltages to inputs of an integrator, and then quantizing outputs of the integrator to produce a bitstream. The method continues with causing the integrator to integrate the voltage proportional to absolute temperature or causing the integrator to add the correction voltage to the uncorrected voltage complementary to absolute temperature to produce a corrected voltage complementary to absolute temperature and then integrate the corrected voltage complementary to absolute temperature, depending upon a most recent bit of the bitstream.
    Type: Application
    Filed: February 5, 2024
    Publication date: May 30, 2024
    Applicant: STMicroelectronics International N.V.
    Inventors: Atul DWIVEDI, Pijush Kanti PANJA
  • Patent number: 11892360
    Abstract: Circuitry generates base-to-emitter voltages (Vbe1, Vbe2) of two BJTs biased at different current densities, a base-to-emitter voltage (Vbe) of a BJT biased so Vbe is complementary to absolute temperature and has a curved non-linearity across temperature, and base-to-emitter voltages (Vbe1_c, Vbe2_c) of two BJTs biased by a temperature independent constant current and a current proportional to absolute temperature so Vbe2_c?Vbe1_c has the same but opposite curved non-linearity across temperature as Vbe. A sampling circuit samples these voltages and provides them to inputs of a loop filter. Filter outputs are quantized to produce a bitstream.
    Type: Grant
    Filed: December 29, 2020
    Date of Patent: February 6, 2024
    Assignee: STMicroelectron nternational N.V.
    Inventors: Atul Dwivedi, Pijush Kanti Panja
  • Patent number: 11867572
    Abstract: A temperature sensing circuit a switched capacitor circuit selectively samples ?Vbe and Vbe voltages and provides the sampled voltages to inputs of an integrator. A quantization circuit quantizes outputs of the integrator to produce a bitstream. When a most recent bit of the bitstream is a logic zero, operation includes sampling and integration of ?Vbe a first given number of times to produce a voltage proportional to absolute temperature. When the most recent bit of the bitstream is a logic one, operation includes cause sampling and integration of Vbe a second given number of times to produce a voltage complementary to absolute temperature. A low pass filter and decimator filters and decimates the bitstream produced by the quantization circuit to produce a signal indicative of a temperature of a chip into which the temperature sensing circuit is placed.
    Type: Grant
    Filed: November 8, 2021
    Date of Patent: January 9, 2024
    Assignee: STMicroelectron nternational N.V.
    Inventors: Pijush Kanti Panja, Kallol Chatterjee, Atul Dwivedi
  • Publication number: 20230140251
    Abstract: A temperature sensing circuit includes a current generation circuit generating an initial current proportional to absolute temperature (Iptat), and a voltage generation circuit configured to mirror Iptat using an adjustable current source to produce a scaled current and to source the scaled current to a first terminal of a resistor to produce a reference voltage at the first terminal. A second terminal of the resistor has a voltage complementary to absolute temperature (Vctat) applied thereto. An analog-to-digital converter (ADC) has a reference input receiving the reference voltage, and a data input receiving Vctat or an externally sourced voltage. The ADC generates an output code indicative of a ratio between: a) either Vctat or the externally sourced voltage, and b) the reference voltage. A digital circuit determines a temperature readout from the output code and calibrates the reference voltage and the temperature readout determination based upon the output code.
    Type: Application
    Filed: October 13, 2022
    Publication date: May 4, 2023
    Applicant: STMicroelectronics International N.V.
    Inventor: Atul DWIVEDI
  • Publication number: 20220196485
    Abstract: A temperature sensing circuit a switched capacitor circuit selectively samples ?Vbe and Vbe voltages and provides the sampled voltages to inputs of an integrator. A quantization circuit quantizes outputs of the integrator to produce a bitstream. When a most recent bit of the bitstream is a logic zero, operation includes sampling and integration of ?Vbe a first given number of times to produce a voltage proportional to absolute temperature. When the most recent bit of the bitstream is a logic one, operation includes cause sampling and integration of Vbe a second given number of times to produce a voltage complementary to absolute temperature. A low pass filter and decimator filters and decimates the bitstream produced by the quantization circuit to produce a signal indicative of a temperature of a chip into which the temperature sensing circuit is placed.
    Type: Application
    Filed: November 8, 2021
    Publication date: June 23, 2022
    Applicant: STMicroelectronics International N.V.
    Inventors: Pijush Kanti PANJA, Kallol CHATTERJEE, Atul DWIVEDI
  • Publication number: 20210239540
    Abstract: Circuitry generates base-to-emitter voltages (Vbe1, Vbe2) of two BJTs biased at different current densities, a base-to-emitter voltage (Vbe) of a BJT biased so Vbe is complementary to absolute temperature and has a curved non-linearity across temperature, and base-to-emitter voltages (Vbe1_c, Vbe2_c) of two BJTs biased by a temperature independent constant current and a current proportional to absolute temperature so Vbe2_c?Vbe1_c has the same but opposite curved non-linearity across temperature as Vbe. A sampling circuit samples these voltages and provides them to inputs of a loop filter. Filter outputs are quantized to produce a bitstream.
    Type: Application
    Filed: December 29, 2020
    Publication date: August 5, 2021
    Applicant: STMicroelectronics International N.V.
    Inventors: Atul DWIVEDI, Pijush Kanti PANJA
  • Patent number: 10848147
    Abstract: One or more embodiments are directed to inter-integrated circuit (I2C) transmitters, receivers, and devices that utilize a stable reference voltage for driving a pre-driver of the transmitter and for driving a first input stage of the receiver. One embodiment is directed to a device A device that includes an inter-integrated circuit (I2C) transmitter and an I2C receiver. The I2C transmitter includes a driver coupled to an I2C data line, and a pre-driver coupled to a variable first supply voltage, a second supply voltage, and a reference voltage. The pre-driver is configured to output a control signal to a control terminal of the driver. The I2C receiver includes a first stage coupled to the I2C data line, the variable first supply voltage, the second supply voltage, and the reference voltage.
    Type: Grant
    Filed: November 22, 2017
    Date of Patent: November 24, 2020
    Assignee: STMICROELECTRONICS INTERNATIONAL N.V.
    Inventors: Saiyid Mohammad Irshad Rizvi, Atul Dwivedi
  • Publication number: 20200014387
    Abstract: A low-voltage-differential-signaling (LVDS) fault detector includes first and second LVDS lines, and a window comparator provides a first output indicating whether a difference between voltages at the first and second LVDS lines is greater than a threshold voltage, and a second output indicating whether a difference between the voltages at the second and first LVDS lines is greater than the threshold voltage. A charge circuit charges a capacitive node when either the first or second output is at a logic low, and discharges the capacitive node when neither the first nor second output is at a logic low. A Schmitt trigger generates a fault flag if charge on the capacitive node falls to a threshold.
    Type: Application
    Filed: July 5, 2019
    Publication date: January 9, 2020
    Applicant: STMicroelectronics International N.V.
    Inventors: Atul DWIVEDI, Paras GARG, Kallol CHATTERJEE
  • Patent number: 10530366
    Abstract: A low-voltage-differential-signaling (LVDS) fault detector includes first and second LVDS lines, and a window comparator provides a first output indicating whether a difference between voltages at the first and second LVDS lines is greater than a threshold voltage, and a second output indicating whether a difference between the voltages at the second and first LVDS lines is greater than the threshold voltage. A charge circuit charges a capacitive node when either the first or second output is at a logic low, and discharges the capacitive node when neither the first nor second output is at a logic low. A Schmitt trigger generates a fault flag if charge on the capacitive node falls to a threshold.
    Type: Grant
    Filed: July 5, 2019
    Date of Patent: January 7, 2020
    Assignee: STMicroelectronics International N.V.
    Inventors: Atul Dwivedi, Paras Garg, Kallol Chatterjee
  • Publication number: 20190158085
    Abstract: One or more embodiments are directed to inter-integrated circuit (I2C) transmitters, receivers, and devices that utilize a stable reference voltage for driving a pre-driver of the transmitter and for driving a first input stage of the receiver. One embodiment is directed to a device A device that includes an inter-integrated circuit (I2C) transmitter and an I2C receiver. The I2C transmitter includes a driver coupled to an I2C data line, and a pre-driver coupled to a variable first supply voltage, a second supply voltage, and a reference voltage. The pre-driver is configured to output a control signal to a control terminal of the driver. The I2C receiver includes a first stage coupled to the I2C data line, the variable first supply voltage, the second supply voltage, and the reference voltage.
    Type: Application
    Filed: November 22, 2017
    Publication date: May 23, 2019
    Inventors: Saiyid Mohammad Irshad RIZVI, Atul DWIVEDI