Patents by Inventor Atul Kumar Agrawal
Atul Kumar Agrawal has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11936395Abstract: In described examples, a digital-to-analog converter (DAC) includes an output, a ground, a reference voltage terminal, an input code terminal, multiple switches, multiple resistors, and a controller. The switches couple to the reference voltage terminal when activated and to the ground when deactivated. The resistors are variously coupled between corresponding ones of the switches and the output, so that activating the switches causes the DAC to output an output voltage. The controller is coupled to the input code terminal and coupled to control the switches. The controller generates an output code based on an input code in response to at least one differential nonlinearity error greater than one least significant bit voltage. The input code corresponds to a first ideal output voltage, the output code corresponds to a second, different ideal output voltage. The controller generates an output voltage by controlling the switches using the output code.Type: GrantFiled: January 27, 2022Date of Patent: March 19, 2024Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Tanmay Neema, Gautam Salil Nandi, Rishubh Khurana, Atul Kumar Agrawal, Deepak Kumar Meher
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Patent number: 11876530Abstract: An example apparatus includes: a voltage-to-current circuit including a first input terminal, a first output terminal and a second output terminal, a subtraction circuit including a second input terminal and a third output terminal, the second input terminal coupled to the second output terminal, a first driver circuit including a third input terminal and a fourth output terminal, the third input terminal coupled to the third output terminal, and a second driver circuit including a fourth input terminal and a fifth output terminal, the fourth input terminal coupled to the first output terminal, the fifth output coupled to the fourth output terminal.Type: GrantFiled: September 30, 2021Date of Patent: January 16, 2024Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Atul Kumar Agrawal, Kanak Chandra Das
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Publication number: 20230238973Abstract: In described examples, a digital-to-analog converter (DAC) includes an output, a ground, a reference voltage terminal, an input code terminal, multiple switches, multiple resistors, and a controller. The switches couple to the reference voltage terminal when activated and to the ground when deactivated. The resistors are variously coupled between corresponding ones of the switches and the output, so that activating the switches causes the DAC to output an output voltage. The controller is coupled to the input code terminal and coupled to control the switches. The controller generates an output code based on an input code in response to at least one differential nonlinearity error greater than one least significant bit voltage. The input code corresponds to a first ideal output voltage, the output code corresponds to a second, different ideal output voltage. The controller generates an output voltage by controlling the switches using the output code.Type: ApplicationFiled: January 27, 2022Publication date: July 27, 2023Inventors: Tanmay Neema, Gautam Salil Nandi, Rishubh Khurana, Atul Kumar Agrawal, Deepak Kumar Meher
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Publication number: 20230238972Abstract: In described examples, a digital-to-analog converter includes an output, multiple most significant bit (MSB) connector resistors each having a resistance R??R, multiple least significant bit (LSB) connector resistors each having a resistance R, and multiple binary arm resistors each having a resistance 2R. The MSB connector resistors are coupled in a series beginning with the output and ending with a first one of the LSB connector resistors, and the LSB connector resistors are coupled in a series beginning with the first LSB connector resistor. A terminal of one of the binary arm resistors is coupled to an ending of the LSB connector resistor series, and a terminal of each of different remaining ones of the binary arm resistors is coupled between a different pair of the MSB and/or LSB connector resistors.Type: ApplicationFiled: January 27, 2022Publication date: July 27, 2023Inventors: Tanmay Neema, Gautam Salil Nandi, Rishubh Khurana, Atul Kumar Agrawal, Deepak Kumar Meher
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Publication number: 20230100835Abstract: An example apparatus includes: a voltage-to-current circuit including a first input terminal, a first output terminal and a second output terminal, a subtraction circuit including a second input terminal and a third output terminal, the second input terminal coupled to the second output terminal, a first driver circuit including a third input terminal and a fourth output terminal, the third input terminal coupled to the third output terminal, and a second driver circuit including a fourth input terminal and a fifth output terminal, the fourth input terminal coupled to the first output terminal, the fifth output coupled to the fourth output terminal.Type: ApplicationFiled: September 30, 2021Publication date: March 30, 2023Inventors: Atul Kumar Agrawal, Kanak Chandra Das
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Publication number: 20210194479Abstract: An integrated circuit includes a power-on reset (POR) circuit and a digital logic circuit. The POR has first and second control outputs. The POR circuit is configured to generate a first control signal on the first control output responsive to a supply voltage on the supply voltage node exceeding a first threshold voltage and is configured to generate a second control signal on the second control output responsive to the supply voltage exceeding a second threshold voltage. The digital logic circuit has a first control input coupled to the first control output of the POR circuit and has a second control input coupled to the second control output of the POR circuit. The digital logic circuit is configured to initiate a first read transaction responsive to assertion of the first control signal and to initiate a second read transaction responsive to assertion of the second control signal.Type: ApplicationFiled: March 8, 2021Publication date: June 24, 2021Inventors: Rishubh KHURANA, Tanmay NEEMA, Kanak Chandra DAS, Atul Kumar AGRAWAL
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Patent number: 10972092Abstract: An integrated circuit includes a power-on reset (POR) circuit and a digital logic circuit. The POR has first and second control outputs. The POR circuit is configured to generate a first control signal on the first control output responsive to a supply voltage on the supply voltage node exceeding a first threshold voltage and is configured to generate a second control signal on the second control output responsive to the supply voltage exceeding a second threshold voltage. The digital logic circuit has a first control input coupled to the first control output of the POR circuit and has a second control input coupled to the second control output of the POR circuit. The digital logic circuit is configured to initiate a first read transaction responsive to assertion of the first control signal and to initiate a second read transaction responsive to assertion of the second control signal.Type: GrantFiled: May 21, 2020Date of Patent: April 6, 2021Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Rishubh Khurana, Tanmay Neema, Kanak Chandra Das, Atul Kumar Agrawal
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Publication number: 20210036701Abstract: An integrated circuit includes a power-on reset (POR) circuit and a digital logic circuit. The POR has first and second control outputs. The POR circuit is configured to generate a first control signal on the first control output responsive to a supply voltage on the supply voltage node exceeding a first threshold voltage and is configured to generate a second control signal on the second control output responsive to the supply voltage exceeding a second threshold voltage. The digital logic circuit has a first control input coupled to the first control output of the POR circuit and has a second control input coupled to the second control output of the POR circuit. The digital logic circuit is configured to initiate a first read transaction responsive to assertion of the first control signal and to initiate a second read transaction responsive to assertion of the second control signal.Type: ApplicationFiled: May 21, 2020Publication date: February 4, 2021Inventors: Rishubh KHURANA, Tanmay NEEMA, Kanak Chandra DAS, Atul Kumar AGRAWAL
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Patent number: 10862493Abstract: An integrated circuit includes a digital-to-analog converter (DAC) core including a plurality of thermometric arms and an R-2R ladder, the DAC core to convert a DAC code to an analog signal. The integrated circuit includes additional components as well. A differential non-linearity (DNL) calibration circuit outputs DNL coefficients based on the DAC code. A memory stores a value indicative of a product of a resistor temperature coefficient (TC) and a resistor self-heating coefficient (SHC). A current DAC (IDAC) couples to the R-2R ladder. A self-heating calibration circuit generates a self-heating trim code based on the value from the memory. An adder adds a value indicative of the DNL coefficients with the self-heating trim code to generate an IDAC trim code and provides the IDAC trim code to the IDAC to trim the R-2R ladder.Type: GrantFiled: April 21, 2020Date of Patent: December 8, 2020Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Atul Kumar Agrawal, Gautam Salil Nandi, Siddharth Malhotra, Tanmay Neema
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Publication number: 20200252073Abstract: An integrated circuit includes a digital-to-analog converter (DAC) core including a plurality of thermometric arms and an R-2R ladder, the DAC core to convert a DAC code to an analog signal. The integrated circuit includes additional components as well. A differential non-linearity (DNL) calibration circuit outputs DNL coefficients based on the DAC code. A memory stores a value indicative of a product of a resistor temperature coefficient (TC) and a resistor self-heating coefficient (SHC). A current DAC (IDAC) couples to the R-2R ladder. A self-heating calibration circuit generates a self-heating trim code based on the value from the memory. An adder adds a value indicative of the DNL coefficients with the self-heating trim code to generate an IDAC trim code and provides the IDAC trim code to the IDAC to trim the R-2R ladder.Type: ApplicationFiled: April 21, 2020Publication date: August 6, 2020Inventors: Atul Kumar AGRAWAL, Gautam Salil NANDI, Siddharth MALHOTRA, Tanmay NEEMA
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Patent number: 10673450Abstract: An integrated circuit includes a digital-to-analog converter (DAC) core including a plurality of thermometric arms and an R-2R ladder, the DAC core to convert a DAC code to an analog signal. The integrated circuit includes additional components as well. A differential non-linearity (DNL) calibration circuit outputs DNL coefficients based on the DAC code. A memory stores a value indicative of a product of a resistor temperature coefficient (TC) and a resistor self-heating coefficient (SHC). A current DAC (IDAC) couples to the R-2R ladder. A self-heating calibration circuit generates a self-heating trim code based on the value from the memory. An adder adds a value indicative of the DNL coefficients with the self-heating trim code to generate an IDAC trim code and provides the IDAC trim code to the IDAC to trim the R-2R ladder.Type: GrantFiled: November 20, 2018Date of Patent: June 2, 2020Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Atul Kumar Agrawal, Gautam Salil Nandi, Siddharth Malhotra, Tanmay Neema
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Publication number: 20200162090Abstract: An integrated circuit includes a digital-to-analog converter (DAC) core including a plurality of thermometric arms and an R-2R ladder, the DAC core to convert a DAC code to an analog signal. The integrated circuit includes additional components as well. A differential non-linearity (DNL) calibration circuit outputs DNL coefficients based on the DAC code. A memory stores a value indicative of a product of a resistor temperature coefficient (TC) and a resistor self-heating coefficient (SHC). A current DAC (IDAC) couples to the R-2R ladder. A self-heating calibration circuit generates a self-heating trim code based on the value from the memory. An adder adds a value indicative of the DNL coefficients with the self-heating trim code to generate an IDAC trim code and provides the IDAC trim code to the IDAC to trim the R-2R ladder.Type: ApplicationFiled: November 20, 2018Publication date: May 21, 2020Inventors: Atul Kumar AGRAWAL, Gautam Salil NANDI, Siddharth MALHOTRA, Tanmay NEEMA
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Patent number: 9156344Abstract: A powertrain has an engine with a crankshaft. The powertrain includes a planetary gear set having a first, a second, and a third member. The first member is connected for common rotation with an input member. A first clutch is selectively engageable to operatively connect the crankshaft with the input member. A second clutch is selectively engageable to ground the input member with a stationary member. An electric motor/generator has a rotor operatively connected for common rotation with the second member. An output member is provided, with a set of intermeshing gears configured to transfer torque from the third member to the output member. A first gear pair and a second gear pair are operable by engagement of a first synchronizer and a second synchronizer, respectively, to provide two different fixed ratios between the input member and the output member.Type: GrantFiled: December 13, 2010Date of Patent: October 13, 2015Assignee: GM Global Technology Operations LLCInventors: Awadesh Tiwari, Ravikanth G V, Atul Kumar Agrawal, Madhukar Kumar, Vikas Bhu Sharma
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Patent number: 8515633Abstract: A control system for an engine of a vehicle includes a shift forecasting module that forecasts one of an upshift and a downshift of a manual transmission based on vehicle acceleration, clutch pedal position, acceleration pedal position and brake pedal position. A gear state calculating module determines a current gear state based on a speed of the engine and a speed of the vehicle. A next gear state calculating module determines a next gear state. The next gear state is based on the current gear state and the one of the upshift and downshift. A next engine speed calculating module estimates an estimated engine speed based on the next gear state and the vehicle speed. An engine speed control module adjusts the engine speed based on the estimated engine speed.Type: GrantFiled: July 6, 2010Date of Patent: August 20, 2013Inventors: Ravikanth G V, Aurobbindo Lingegowda, Atul Kumar Agrawal, Awadesh Tiwari
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Patent number: 8414440Abstract: A hybrid powertrain has an engine, an input member, an output member, and a stationary member, and includes a single planetary gear set having a first, a second, and a third member. The input member is connected for common rotation with the engine. The output member is connected for common rotation with the second member. A first and a second motor/generator are provided, as well as five torque-transmitting mechanisms, including only one brake. The torque-transmitting mechanisms are engagable in different combinations to establish at least two electric-only operating mode, at least two engine-only operating mode, and at least three electrically-variable operating modes. In one embodiment, an electric torque converter operating mode is provided, and may be the default mode in case of motor/generator failure.Type: GrantFiled: November 11, 2009Date of Patent: April 9, 2013Assignee: GM Global Technology Operations LLCInventors: Awadesh Tiwari, Deepa Kesavan, Atul Kumar Agrawal, Ravikanth GV
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Patent number: 8272987Abstract: A hybrid powertrain has an engine, an input member, an output member, and a stationary member, and includes a single planetary gear set having a first, a second, and a third member. The input member is connected for common rotation with the engine and the output member is connected for common rotation with the second member. A single motor/generator is continuously connected for common rotation with the third member. A starter motor is operatively connected to the engine for starting the engine. A first torque-transmitting mechanism is selectively engagable to connect the input member for rotation with the first member. A second torque-transmitting mechanism is selectively engagable to ground the first member to the stationary member. A third torque-transmitting mechanism is selectively engagable to ground the third member to the stationary member. The powertrain is operable in an electric-only operating mode, an engine-only operating mode, and an electrically-variable operating mode.Type: GrantFiled: October 15, 2009Date of Patent: September 25, 2012Assignee: GM Global Technology Operations LLCInventors: Awadesh Tiwari, Ravikanth G V, Atul Kumar Agrawal, Deepa Kesavan
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Publication number: 20120149514Abstract: A powertrain has an engine with a crankshaft. The powertrain includes a planetary gear set having a first, a second, and a third member. The first member is connected for common rotation with an input member. A first clutch is selectively engageable to operatively connect the crankshaft with the input member. A second clutch is selectively engageable to ground the input member with a stationary member. An electric motor/generator has a rotor operatively connected for common rotation with the second member. An output member is provided, with a set of intermeshing gears configured to transfer torque from the third member to the output member. A first gear pair and a second gear pair are operable by engagement of a first synchronizer and a second synchronizer, respectively, to provide two different fixed ratios between the input member and the output member.Type: ApplicationFiled: December 13, 2010Publication date: June 14, 2012Applicant: GM GLOBAL TECHNOLOGY OPERATIONS LLCInventors: Awadesh Tiwari, Ravikanth GV, Atul Kumar Agrawal, Madhukar Kumar, Vikas Bhu Sharma
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Publication number: 20120010796Abstract: A control system for an engine of a vehicle includes a shift forecasting module that forecasts one of an upshift and a downshift of a manual transmission based on vehicle acceleration, clutch pedal position, acceleration pedal position and brake pedal position. A gear state calculating module determines a current gear state based on a speed of the engine and a speed of the vehicle. A next gear state calculating module determines a next gear state. The next gear state is based on the current gear state and the one of the upshift and downshift. A next engine speed calculating module estimates an estimated engine speed based on the next gear state and the vehicle speed. An engine speed control module adjusts the engine speed based on the estimated engine speed.Type: ApplicationFiled: July 6, 2010Publication date: January 12, 2012Applicant: GM GLOBAL TECHNOLOGY OPERATION, INC.Inventors: Ravikanth G V, Aurobbindo Lingegowda, Atul Kumar Agrawal, Awadesh Tiwari
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Publication number: 20110111905Abstract: A hybrid powertrain has an engine, an input member, an output member, and a stationary member, and includes a single planetary gear set having a first, a second, and a third member. The input member is connected for common rotation with the engine. The output member is connected for common rotation with the second member. A first and a second motor/generator are provided, as well as five torque-transmitting mechanisms, including only one brake. The torque-transmitting mechanisms are engagable in different combinations to establish at least two electric-only operating mode, at least two engine-only operating mode, and at least three electrically-variable operating modes. In one embodiment, an electric torque converter operating mode is provided, and may be the default mode in case of motor/generator failure.Type: ApplicationFiled: November 11, 2009Publication date: May 12, 2011Applicant: GM GLOBAL TECHNOLOGY OPERATIONS, INC.Inventors: Awadesh Tiwari, Deepa Kesavan, Atul Kumar Agrawal, Ravikanth GV
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Publication number: 20110092328Abstract: A hybrid powertrain has an engine, an input member, an output member, and a stationary member, and includes a single planetary gear set having a first, a second, and a third member. The input member is connected for common rotation with the engine and the output member is connected for common rotation with the second member. A single motor/generator is continuously connected for common rotation with the third member. A starter motor is operatively connected to the engine for starting the engine. A first torque-transmitting mechanism is selectively engagable to connect the input member for rotation with the first member. A second torque-transmitting mechanism is selectively engagable to ground the first member to the stationary member. A third torque-transmitting mechanism is selectively engagable to ground the third member to the stationary member. The powertrain is operable in an electric-only operating mode, an engine-only operating mode, and an electrically-variable operating mode.Type: ApplicationFiled: October 15, 2009Publication date: April 21, 2011Applicant: GM GLOBAL TECHNOLOGY OPERATIONS, INC.Inventors: Awadesh Tiwari, Ravikanth G V, Atul Kumar Agrawal, Deepa Kesavan