Patents by Inventor Atul Kumar Agrawal

Atul Kumar Agrawal has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11936395
    Abstract: In described examples, a digital-to-analog converter (DAC) includes an output, a ground, a reference voltage terminal, an input code terminal, multiple switches, multiple resistors, and a controller. The switches couple to the reference voltage terminal when activated and to the ground when deactivated. The resistors are variously coupled between corresponding ones of the switches and the output, so that activating the switches causes the DAC to output an output voltage. The controller is coupled to the input code terminal and coupled to control the switches. The controller generates an output code based on an input code in response to at least one differential nonlinearity error greater than one least significant bit voltage. The input code corresponds to a first ideal output voltage, the output code corresponds to a second, different ideal output voltage. The controller generates an output voltage by controlling the switches using the output code.
    Type: Grant
    Filed: January 27, 2022
    Date of Patent: March 19, 2024
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Tanmay Neema, Gautam Salil Nandi, Rishubh Khurana, Atul Kumar Agrawal, Deepak Kumar Meher
  • Patent number: 11876530
    Abstract: An example apparatus includes: a voltage-to-current circuit including a first input terminal, a first output terminal and a second output terminal, a subtraction circuit including a second input terminal and a third output terminal, the second input terminal coupled to the second output terminal, a first driver circuit including a third input terminal and a fourth output terminal, the third input terminal coupled to the third output terminal, and a second driver circuit including a fourth input terminal and a fifth output terminal, the fourth input terminal coupled to the first output terminal, the fifth output coupled to the fourth output terminal.
    Type: Grant
    Filed: September 30, 2021
    Date of Patent: January 16, 2024
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Atul Kumar Agrawal, Kanak Chandra Das
  • Publication number: 20230238973
    Abstract: In described examples, a digital-to-analog converter (DAC) includes an output, a ground, a reference voltage terminal, an input code terminal, multiple switches, multiple resistors, and a controller. The switches couple to the reference voltage terminal when activated and to the ground when deactivated. The resistors are variously coupled between corresponding ones of the switches and the output, so that activating the switches causes the DAC to output an output voltage. The controller is coupled to the input code terminal and coupled to control the switches. The controller generates an output code based on an input code in response to at least one differential nonlinearity error greater than one least significant bit voltage. The input code corresponds to a first ideal output voltage, the output code corresponds to a second, different ideal output voltage. The controller generates an output voltage by controlling the switches using the output code.
    Type: Application
    Filed: January 27, 2022
    Publication date: July 27, 2023
    Inventors: Tanmay Neema, Gautam Salil Nandi, Rishubh Khurana, Atul Kumar Agrawal, Deepak Kumar Meher
  • Publication number: 20230238972
    Abstract: In described examples, a digital-to-analog converter includes an output, multiple most significant bit (MSB) connector resistors each having a resistance R??R, multiple least significant bit (LSB) connector resistors each having a resistance R, and multiple binary arm resistors each having a resistance 2R. The MSB connector resistors are coupled in a series beginning with the output and ending with a first one of the LSB connector resistors, and the LSB connector resistors are coupled in a series beginning with the first LSB connector resistor. A terminal of one of the binary arm resistors is coupled to an ending of the LSB connector resistor series, and a terminal of each of different remaining ones of the binary arm resistors is coupled between a different pair of the MSB and/or LSB connector resistors.
    Type: Application
    Filed: January 27, 2022
    Publication date: July 27, 2023
    Inventors: Tanmay Neema, Gautam Salil Nandi, Rishubh Khurana, Atul Kumar Agrawal, Deepak Kumar Meher
  • Publication number: 20230100835
    Abstract: An example apparatus includes: a voltage-to-current circuit including a first input terminal, a first output terminal and a second output terminal, a subtraction circuit including a second input terminal and a third output terminal, the second input terminal coupled to the second output terminal, a first driver circuit including a third input terminal and a fourth output terminal, the third input terminal coupled to the third output terminal, and a second driver circuit including a fourth input terminal and a fifth output terminal, the fourth input terminal coupled to the first output terminal, the fifth output coupled to the fourth output terminal.
    Type: Application
    Filed: September 30, 2021
    Publication date: March 30, 2023
    Inventors: Atul Kumar Agrawal, Kanak Chandra Das
  • Publication number: 20210194479
    Abstract: An integrated circuit includes a power-on reset (POR) circuit and a digital logic circuit. The POR has first and second control outputs. The POR circuit is configured to generate a first control signal on the first control output responsive to a supply voltage on the supply voltage node exceeding a first threshold voltage and is configured to generate a second control signal on the second control output responsive to the supply voltage exceeding a second threshold voltage. The digital logic circuit has a first control input coupled to the first control output of the POR circuit and has a second control input coupled to the second control output of the POR circuit. The digital logic circuit is configured to initiate a first read transaction responsive to assertion of the first control signal and to initiate a second read transaction responsive to assertion of the second control signal.
    Type: Application
    Filed: March 8, 2021
    Publication date: June 24, 2021
    Inventors: Rishubh KHURANA, Tanmay NEEMA, Kanak Chandra DAS, Atul Kumar AGRAWAL
  • Patent number: 10972092
    Abstract: An integrated circuit includes a power-on reset (POR) circuit and a digital logic circuit. The POR has first and second control outputs. The POR circuit is configured to generate a first control signal on the first control output responsive to a supply voltage on the supply voltage node exceeding a first threshold voltage and is configured to generate a second control signal on the second control output responsive to the supply voltage exceeding a second threshold voltage. The digital logic circuit has a first control input coupled to the first control output of the POR circuit and has a second control input coupled to the second control output of the POR circuit. The digital logic circuit is configured to initiate a first read transaction responsive to assertion of the first control signal and to initiate a second read transaction responsive to assertion of the second control signal.
    Type: Grant
    Filed: May 21, 2020
    Date of Patent: April 6, 2021
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Rishubh Khurana, Tanmay Neema, Kanak Chandra Das, Atul Kumar Agrawal
  • Publication number: 20210036701
    Abstract: An integrated circuit includes a power-on reset (POR) circuit and a digital logic circuit. The POR has first and second control outputs. The POR circuit is configured to generate a first control signal on the first control output responsive to a supply voltage on the supply voltage node exceeding a first threshold voltage and is configured to generate a second control signal on the second control output responsive to the supply voltage exceeding a second threshold voltage. The digital logic circuit has a first control input coupled to the first control output of the POR circuit and has a second control input coupled to the second control output of the POR circuit. The digital logic circuit is configured to initiate a first read transaction responsive to assertion of the first control signal and to initiate a second read transaction responsive to assertion of the second control signal.
    Type: Application
    Filed: May 21, 2020
    Publication date: February 4, 2021
    Inventors: Rishubh KHURANA, Tanmay NEEMA, Kanak Chandra DAS, Atul Kumar AGRAWAL
  • Patent number: 10862493
    Abstract: An integrated circuit includes a digital-to-analog converter (DAC) core including a plurality of thermometric arms and an R-2R ladder, the DAC core to convert a DAC code to an analog signal. The integrated circuit includes additional components as well. A differential non-linearity (DNL) calibration circuit outputs DNL coefficients based on the DAC code. A memory stores a value indicative of a product of a resistor temperature coefficient (TC) and a resistor self-heating coefficient (SHC). A current DAC (IDAC) couples to the R-2R ladder. A self-heating calibration circuit generates a self-heating trim code based on the value from the memory. An adder adds a value indicative of the DNL coefficients with the self-heating trim code to generate an IDAC trim code and provides the IDAC trim code to the IDAC to trim the R-2R ladder.
    Type: Grant
    Filed: April 21, 2020
    Date of Patent: December 8, 2020
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Atul Kumar Agrawal, Gautam Salil Nandi, Siddharth Malhotra, Tanmay Neema
  • Publication number: 20200252073
    Abstract: An integrated circuit includes a digital-to-analog converter (DAC) core including a plurality of thermometric arms and an R-2R ladder, the DAC core to convert a DAC code to an analog signal. The integrated circuit includes additional components as well. A differential non-linearity (DNL) calibration circuit outputs DNL coefficients based on the DAC code. A memory stores a value indicative of a product of a resistor temperature coefficient (TC) and a resistor self-heating coefficient (SHC). A current DAC (IDAC) couples to the R-2R ladder. A self-heating calibration circuit generates a self-heating trim code based on the value from the memory. An adder adds a value indicative of the DNL coefficients with the self-heating trim code to generate an IDAC trim code and provides the IDAC trim code to the IDAC to trim the R-2R ladder.
    Type: Application
    Filed: April 21, 2020
    Publication date: August 6, 2020
    Inventors: Atul Kumar AGRAWAL, Gautam Salil NANDI, Siddharth MALHOTRA, Tanmay NEEMA
  • Patent number: 10673450
    Abstract: An integrated circuit includes a digital-to-analog converter (DAC) core including a plurality of thermometric arms and an R-2R ladder, the DAC core to convert a DAC code to an analog signal. The integrated circuit includes additional components as well. A differential non-linearity (DNL) calibration circuit outputs DNL coefficients based on the DAC code. A memory stores a value indicative of a product of a resistor temperature coefficient (TC) and a resistor self-heating coefficient (SHC). A current DAC (IDAC) couples to the R-2R ladder. A self-heating calibration circuit generates a self-heating trim code based on the value from the memory. An adder adds a value indicative of the DNL coefficients with the self-heating trim code to generate an IDAC trim code and provides the IDAC trim code to the IDAC to trim the R-2R ladder.
    Type: Grant
    Filed: November 20, 2018
    Date of Patent: June 2, 2020
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Atul Kumar Agrawal, Gautam Salil Nandi, Siddharth Malhotra, Tanmay Neema
  • Publication number: 20200162090
    Abstract: An integrated circuit includes a digital-to-analog converter (DAC) core including a plurality of thermometric arms and an R-2R ladder, the DAC core to convert a DAC code to an analog signal. The integrated circuit includes additional components as well. A differential non-linearity (DNL) calibration circuit outputs DNL coefficients based on the DAC code. A memory stores a value indicative of a product of a resistor temperature coefficient (TC) and a resistor self-heating coefficient (SHC). A current DAC (IDAC) couples to the R-2R ladder. A self-heating calibration circuit generates a self-heating trim code based on the value from the memory. An adder adds a value indicative of the DNL coefficients with the self-heating trim code to generate an IDAC trim code and provides the IDAC trim code to the IDAC to trim the R-2R ladder.
    Type: Application
    Filed: November 20, 2018
    Publication date: May 21, 2020
    Inventors: Atul Kumar AGRAWAL, Gautam Salil NANDI, Siddharth MALHOTRA, Tanmay NEEMA
  • Patent number: 9156344
    Abstract: A powertrain has an engine with a crankshaft. The powertrain includes a planetary gear set having a first, a second, and a third member. The first member is connected for common rotation with an input member. A first clutch is selectively engageable to operatively connect the crankshaft with the input member. A second clutch is selectively engageable to ground the input member with a stationary member. An electric motor/generator has a rotor operatively connected for common rotation with the second member. An output member is provided, with a set of intermeshing gears configured to transfer torque from the third member to the output member. A first gear pair and a second gear pair are operable by engagement of a first synchronizer and a second synchronizer, respectively, to provide two different fixed ratios between the input member and the output member.
    Type: Grant
    Filed: December 13, 2010
    Date of Patent: October 13, 2015
    Assignee: GM Global Technology Operations LLC
    Inventors: Awadesh Tiwari, Ravikanth G V, Atul Kumar Agrawal, Madhukar Kumar, Vikas Bhu Sharma
  • Patent number: 8515633
    Abstract: A control system for an engine of a vehicle includes a shift forecasting module that forecasts one of an upshift and a downshift of a manual transmission based on vehicle acceleration, clutch pedal position, acceleration pedal position and brake pedal position. A gear state calculating module determines a current gear state based on a speed of the engine and a speed of the vehicle. A next gear state calculating module determines a next gear state. The next gear state is based on the current gear state and the one of the upshift and downshift. A next engine speed calculating module estimates an estimated engine speed based on the next gear state and the vehicle speed. An engine speed control module adjusts the engine speed based on the estimated engine speed.
    Type: Grant
    Filed: July 6, 2010
    Date of Patent: August 20, 2013
    Inventors: Ravikanth G V, Aurobbindo Lingegowda, Atul Kumar Agrawal, Awadesh Tiwari
  • Patent number: 8414440
    Abstract: A hybrid powertrain has an engine, an input member, an output member, and a stationary member, and includes a single planetary gear set having a first, a second, and a third member. The input member is connected for common rotation with the engine. The output member is connected for common rotation with the second member. A first and a second motor/generator are provided, as well as five torque-transmitting mechanisms, including only one brake. The torque-transmitting mechanisms are engagable in different combinations to establish at least two electric-only operating mode, at least two engine-only operating mode, and at least three electrically-variable operating modes. In one embodiment, an electric torque converter operating mode is provided, and may be the default mode in case of motor/generator failure.
    Type: Grant
    Filed: November 11, 2009
    Date of Patent: April 9, 2013
    Assignee: GM Global Technology Operations LLC
    Inventors: Awadesh Tiwari, Deepa Kesavan, Atul Kumar Agrawal, Ravikanth GV
  • Patent number: 8272987
    Abstract: A hybrid powertrain has an engine, an input member, an output member, and a stationary member, and includes a single planetary gear set having a first, a second, and a third member. The input member is connected for common rotation with the engine and the output member is connected for common rotation with the second member. A single motor/generator is continuously connected for common rotation with the third member. A starter motor is operatively connected to the engine for starting the engine. A first torque-transmitting mechanism is selectively engagable to connect the input member for rotation with the first member. A second torque-transmitting mechanism is selectively engagable to ground the first member to the stationary member. A third torque-transmitting mechanism is selectively engagable to ground the third member to the stationary member. The powertrain is operable in an electric-only operating mode, an engine-only operating mode, and an electrically-variable operating mode.
    Type: Grant
    Filed: October 15, 2009
    Date of Patent: September 25, 2012
    Assignee: GM Global Technology Operations LLC
    Inventors: Awadesh Tiwari, Ravikanth G V, Atul Kumar Agrawal, Deepa Kesavan
  • Publication number: 20120149514
    Abstract: A powertrain has an engine with a crankshaft. The powertrain includes a planetary gear set having a first, a second, and a third member. The first member is connected for common rotation with an input member. A first clutch is selectively engageable to operatively connect the crankshaft with the input member. A second clutch is selectively engageable to ground the input member with a stationary member. An electric motor/generator has a rotor operatively connected for common rotation with the second member. An output member is provided, with a set of intermeshing gears configured to transfer torque from the third member to the output member. A first gear pair and a second gear pair are operable by engagement of a first synchronizer and a second synchronizer, respectively, to provide two different fixed ratios between the input member and the output member.
    Type: Application
    Filed: December 13, 2010
    Publication date: June 14, 2012
    Applicant: GM GLOBAL TECHNOLOGY OPERATIONS LLC
    Inventors: Awadesh Tiwari, Ravikanth GV, Atul Kumar Agrawal, Madhukar Kumar, Vikas Bhu Sharma
  • Publication number: 20120010796
    Abstract: A control system for an engine of a vehicle includes a shift forecasting module that forecasts one of an upshift and a downshift of a manual transmission based on vehicle acceleration, clutch pedal position, acceleration pedal position and brake pedal position. A gear state calculating module determines a current gear state based on a speed of the engine and a speed of the vehicle. A next gear state calculating module determines a next gear state. The next gear state is based on the current gear state and the one of the upshift and downshift. A next engine speed calculating module estimates an estimated engine speed based on the next gear state and the vehicle speed. An engine speed control module adjusts the engine speed based on the estimated engine speed.
    Type: Application
    Filed: July 6, 2010
    Publication date: January 12, 2012
    Applicant: GM GLOBAL TECHNOLOGY OPERATION, INC.
    Inventors: Ravikanth G V, Aurobbindo Lingegowda, Atul Kumar Agrawal, Awadesh Tiwari
  • Publication number: 20110111905
    Abstract: A hybrid powertrain has an engine, an input member, an output member, and a stationary member, and includes a single planetary gear set having a first, a second, and a third member. The input member is connected for common rotation with the engine. The output member is connected for common rotation with the second member. A first and a second motor/generator are provided, as well as five torque-transmitting mechanisms, including only one brake. The torque-transmitting mechanisms are engagable in different combinations to establish at least two electric-only operating mode, at least two engine-only operating mode, and at least three electrically-variable operating modes. In one embodiment, an electric torque converter operating mode is provided, and may be the default mode in case of motor/generator failure.
    Type: Application
    Filed: November 11, 2009
    Publication date: May 12, 2011
    Applicant: GM GLOBAL TECHNOLOGY OPERATIONS, INC.
    Inventors: Awadesh Tiwari, Deepa Kesavan, Atul Kumar Agrawal, Ravikanth GV
  • Publication number: 20110092328
    Abstract: A hybrid powertrain has an engine, an input member, an output member, and a stationary member, and includes a single planetary gear set having a first, a second, and a third member. The input member is connected for common rotation with the engine and the output member is connected for common rotation with the second member. A single motor/generator is continuously connected for common rotation with the third member. A starter motor is operatively connected to the engine for starting the engine. A first torque-transmitting mechanism is selectively engagable to connect the input member for rotation with the first member. A second torque-transmitting mechanism is selectively engagable to ground the first member to the stationary member. A third torque-transmitting mechanism is selectively engagable to ground the third member to the stationary member. The powertrain is operable in an electric-only operating mode, an engine-only operating mode, and an electrically-variable operating mode.
    Type: Application
    Filed: October 15, 2009
    Publication date: April 21, 2011
    Applicant: GM GLOBAL TECHNOLOGY OPERATIONS, INC.
    Inventors: Awadesh Tiwari, Ravikanth G V, Atul Kumar Agrawal, Deepa Kesavan