Patents by Inventor Atushi Hiraishi

Atushi Hiraishi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5091883
    Abstract: An input buffer for processing an external signal is provided in one of passways, which is the most closest to a line for equally dividing the whole of a plurality of memory cell blocks longitudinally or laterally into two sections, the passway interposing between the adjacent memory cell blocks of the plurality of memory cell blocks to which a processed signal of the input buffer is transmitted, whereby the length of the signal pass from the input buffer to each memory cell of the memory cell blocks can be shortened. Therefore, since the memory cell or a logic element existing between the input buffer and the memory cell is operated by a pulse of little distortion without delay of time, a access time can be reduced and a processing speed of a microprocessor can be increased. Further, a degree of freedom in designing a system of a memory or the microprocessor is further improved.
    Type: Grant
    Filed: July 13, 1990
    Date of Patent: February 25, 1992
    Assignee: Hitachi, Ltd.
    Inventors: Nozomu Matsuzaki, Takashi Akioka, Masahiro Iwamura, Atushi Hiraishi, Tatsumi Yamauchi, Yuji Yokoyama, Yutaka Kobayashi, Hideaki Uchida