Patents by Inventor Atushi Kawabata

Atushi Kawabata has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9307666
    Abstract: The present invention provides an electric circuit device in which it is possible to achieve simultaneously the improvement of cooling performance and reduction in operating loss due to line inductance. The above object can be attained by constructing multiple plate-like conductors so that each of these conductors electrically connected to multiple semiconductor chips is also thermally connected to both chip surfaces of each such semiconductor chip to release heat from the chip surfaces of each semiconductor chip, and so that among the above conductors, a DC positive-polarity plate-like conductor and a DC negative-polarity plate-like conductor are opposed to each other at the respective conductor surfaces.
    Type: Grant
    Filed: April 25, 2014
    Date of Patent: April 5, 2016
    Assignee: Hitachi, Ltd.
    Inventors: Takeshi Tokuyama, Kinya Nakatsu, Atushi Kawabata
  • Publication number: 20140233204
    Abstract: The present invention provides an electric circuit device in which it is possible to achieve simultaneously the improvement of cooling performance and reduction in operating loss due to line inductance. The above object can be attained by constructing multiple plate-like conductors so that each of these conductors electrically connected to multiple semiconductor chips is also thermally connected to both chip surfaces of each such semiconductor chip to release heat from the chip surfaces of each semiconductor chip, and so that among the above conductors, a DC positive-polarity plate-like conductor and a DC negative-polarity plate-like conductor are opposed to each other at the respective conductor surfaces.
    Type: Application
    Filed: April 25, 2014
    Publication date: August 21, 2014
    Applicant: Hitachi, Ltd
    Inventors: Takeshi TOKUYAMA, Kinya NAKATSU, Atushi KAWABATA
  • Patent number: 8743548
    Abstract: The present invention provides an electric circuit device in which it is possible to achieve simultaneously the improvement of cooling performance and reduction in operating loss due to line inductance. The above object can be attained by constructing multiple plate-like conductors so that each of these conductors electrically connected to multiple semiconductor chips is also thermally connected to both chip surfaces of each such semiconductor chip to release heat from the chip surfaces of each semiconductor chip, and so that among the above conductors, a DC positive-polarity plate-like conductor and a DC negative-polarity plate-like conductor are opposed to each other at the respective conductor surfaces.
    Type: Grant
    Filed: September 23, 2011
    Date of Patent: June 3, 2014
    Assignee: Hitachi, Ltd.
    Inventors: Takeshi Tokuyama, Kinya Nakatsu, Atushi Kawabata
  • Publication number: 20120008280
    Abstract: The present invention provides an electric circuit device in which it is possible to achieve simultaneously the improvement of cooling performance and reduction in operating loss due to line inductance. The above object can be attained by constructing multiple plate-like conductors so that each of these conductors electrically connected to multiple semiconductor chips is also thermally connected to both chip surfaces of each such semiconductor chip to release heat from the chip surfaces of each semiconductor chip, and so that among the above conductors, a DC positive-polarity plate-like conductor and a DC negative-polarity plate-like conductor are opposed to each other at the respective conductor surfaces.
    Type: Application
    Filed: September 23, 2011
    Publication date: January 12, 2012
    Applicant: Hitachi, Ltd.
    Inventors: Takeshi Tokuyama, Kinya Nakatsu, Atushi Kawabata
  • Patent number: 8081472
    Abstract: The present invention provides an electric circuit device in which it is possible to achieve simultaneously the improvement of cooling performance and reduction in operating loss due to line inductance. The above object can be attained by constructing multiple plate-like conductors so that each of these conductors electrically connected to multiple semiconductor chips is also thermally connected to both chip surfaces of each such semiconductor chip to release heat from the chip surfaces of each semiconductor chip, and so that among the above conductors, a DC positive-polarity plate-like conductor and a DC negative-polarity plate-like conductor are opposed to each other at the respective conductor surfaces.
    Type: Grant
    Filed: March 1, 2010
    Date of Patent: December 20, 2011
    Assignee: Hitachi, Ltd.
    Inventors: Takeshi Tokuyama, Kinya Nakatsu, Atushi Kawabata
  • Publication number: 20100165577
    Abstract: The present invention provides an electric circuit device in which it is possible to achieve simultaneously the improvement of cooling performance and reduction in operating loss due to line inductance. The above object can be attained by constructing multiple plate-like conductors so that each of these conductors electrically connected to multiple semiconductor chips is also thermally connected to both chip surfaces of each such semiconductor chip to release heat from the chip surfaces of each semiconductor chip, and so that among the above conductors, a DC positive-polarity plate-like conductor and a DC negative-polarity plate-like conductor are opposed to each other at the respective conductor surfaces.
    Type: Application
    Filed: March 1, 2010
    Publication date: July 1, 2010
    Applicant: Hitachi, Ltd.
    Inventors: Takeshi TOKUYAMA, Kinya Nakatsu, Atushi Kawabata
  • Publication number: 20070252169
    Abstract: The present invention provides an electric circuit device in which it is possible to achieve simultaneously the improvement of cooling performance and reduction in operating loss due to line inductance. The above object can be attained by constructing multiple plate-like conductors so that each of these conductors electrically connected to multiple semiconductor chips is also thermally connected to both chip surfaces of each such semiconductor chip to release heat from the chip surfaces of each semiconductor chip, and so that among the above conductors, a DC positive-polarity plate-like conductor and a DC negative-polarity plate-like conductor are opposed to each other at the respective conductor surfaces.
    Type: Application
    Filed: April 26, 2007
    Publication date: November 1, 2007
    Applicant: Hitachi, Ltd.
    Inventors: Takeshi Tokuyama, Kinya Nakatsu, Atushi Kawabata