Patents by Inventor Atushi YOSHITOMI

Atushi YOSHITOMI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20110001179
    Abstract: In a non-volatile memory in which charge is injected from a gate electrode to a charge accumulating layer, charge injection efficiency, charge retention characteristic and reliability are all improved compared with a conventional gate structure. In a nonvolatile memory which carries out write/erasure by changing the total charge amount by injecting electrons and holes into a silicon nitride film which makes up a charge accumulating layer, in order to highly efficiently carry out charge injection from a gate electrode, the gate electrode of a memory cell is made up of a two-layer film of a non-doped polysilicon layer and a metal material electrode layer.
    Type: Application
    Filed: June 22, 2010
    Publication date: January 6, 2011
    Applicant: RENESAS ELECTRONICS CORPORATION
    Inventors: Itaru YANAGI, Digh HISAMOTO, Daisuke OKADA, Atushi YOSHITOMI, Yasufumi MORIMOTO, Toshiyuki MINE