Patents by Inventor Atusi SIGETANI

Atusi SIGETANI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9312853
    Abstract: A path switching FET and a shunt FET are separated from each other by a capacitor. The gates of the path switching FET and the shunt FET are controlled using an inverter circuit having a first internal power supply voltage (e.g., 2.5 V) as a power supply. The sources and drains of the path switching FET and the shunt FET are controlled using an inverter circuit having a second internal power supply voltage (e.g., 1.25 V) which is smaller than the first internal power supply voltage, as a power supply.
    Type: Grant
    Filed: February 2, 2015
    Date of Patent: April 12, 2016
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Atusi Sigetani, Takahito Miyazaki, Yusuke Nozaki, Masaru Fukusen
  • Publication number: 20150145587
    Abstract: A path switching FET and a shunt FET are separated from each other by a capacitor. The gates of the path switching FET and the shunt FET are controlled using an inverter circuit having a first internal power supply voltage (e.g., 2.5 V) as a power supply. The sources and drains of the path switching FET and the shunt FET are controlled using an inverter circuit having a second internal power supply voltage (e.g., 1.25 V) which is smaller than the first internal power supply voltage, as a power supply.
    Type: Application
    Filed: February 2, 2015
    Publication date: May 28, 2015
    Inventors: Atusi SIGETANI, Takahito MIYAZAKI, Yusuke NOZAKI, Masaru FUKUSEN