Abstract: A counter circuit with multiple registers for eliminating reprogramming delays and for providing seamless switching between timing signals. In a first embodiment, two registers are preloaded with values and control logic chooses between the registers for loading a counter. The counter asserts a terminal count signal to output logic, which correspondingly asserts a convert pulse to an analog measuring circuit. The control logic receives start and stop signals and the terminal count signal, where the control logic controls operation accordingly. In this manner, a delay value is initially loaded into the counter to provide an initial delay period upon receiving the start signal, and then a scan rate value is continually loaded into the counter from another register thereafter for defining the scan rate until the start signal is received.

Abstract: A data acquisition configuration system and method for facilitating the creation of data acquisition applications. The present invention enables the user to create channel configurations which include information for a respective DAQ hardware channel, such as the physical phenomena being measured and how the phenomena is being measured. The user then assigns a name to each respective channel configuration. This channel configuration name is then usable in a data acquisition application to specify the channel configuration, thus simplifying application development. After specifying a channel configuration and assigning a name, the user then constructs a program which controls the data acquisition system. The program construction includes providing the assigned name which specifies the channel configuration for the selected channel of the data acquisition device.

Abstract: An apparatus is provided for use in conjunction with a control system which can provide one or more respective output instructions and one or more corresponding respective timing instructions, the apparatus comprising a counter for providing a count sequence for substantially continuously providing a measure of elapsed time within a prescribed time interval; a storage device, responsive to a match indication, for storing multiple respective output instructions and corresponding multiple respective timing instructions and for asserting respective output instructions and corresponding respective timing instructions in order of a sequence such that upon receipt of a match indication, a next respective output instruction and a corresponding next respective timing instruction in the sequence are asserted; and a comparator for comparing each respective asserted timing instruction to the count of the count sequence and for providing the match indication upon an occurrence of a match.