Patents by Inventor Audrey MARTIN

Audrey MARTIN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10965282
    Abstract: A power switching cell, and associated multi-level converter, include an input port capable of receiving a switching control signal, an input transistor linked by the gate to the input port, and by the source to a reference voltage, a self-biasing circuit comprising a self-biasing transistor linked by the gate to the drain of the input transistor, and a resistor connected in parallel between the gate and the source of the self-biasing transistor, and in series between the drain of the input transistor and the source of the self-biasing transistor, a power transistor, linked by the gate to the source of the self-biasing transistor and by the drain to a power supply voltage, and an isolating transistor linked by the gate and by the source to the gate and to the source of the power transistor, and by the drain to the output port of the cell.
    Type: Grant
    Filed: February 27, 2018
    Date of Patent: March 30, 2021
    Assignees: THALES, COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES, UNIVERSITE DE LIMOGES
    Inventors: Olivier Jardel, Raymond Quere, Stéphane Piotrowicz, Philippe Bouysse, Sylvain Delage, Audrey Martin
  • Publication number: 20190386656
    Abstract: A power switching cell, and associated multi-level converter, include an input port capable of receiving a switching control signal, an input transistor linked by the gate to the input port, and by the source to a reference voltage, a self-biasing circuit comprising a self-biasing transistor linked by the gate to the drain of the input transistor, and a resistor connected in parallel between the gate and the source of the self-biasing transistor, and in series between the drain of the input transistor and the source of the self-biasing transistor, a power transistor, linked by the gate to the source of the self-biasing transistor and by the drain to a power supply voltage, and an isolating transistor linked by the gate and by the source to the gate and to the source of the power transistor, and by the drain to the output port of the cell.
    Type: Application
    Filed: February 27, 2018
    Publication date: December 19, 2019
    Inventors: Olivier JARDEL, Raymond QUERE, Stéphane PIOTROWICZ, Philippe BOUYSSE, Sylvain DELAGE, Audrey MARTIN
  • Patent number: 10038441
    Abstract: A power switching cell with normally on field-effect transistors comprises a current switch receiving the control input signal over an activation input and a power transistor for switching a high voltage VDD applied to its drain, to its source that is connected to the output port of the cell. The control of the gate of the power transistor whose source is floating, according to the input signal, is provided by a self-biasing circuit connected between its gate and source. The current switch is connected between the self-biasing circuit and a zero or negative reference voltage. The self-biasing circuit comprises a transistor whose source or drain is connected to the gate or source of the power transistor. The gate of this transistor is biased by a resistor connected between its gate and source, and between the current switch and the source. The transistors are HEMT transistors using GaN or AsGa technology.
    Type: Grant
    Filed: April 17, 2015
    Date of Patent: July 31, 2018
    Assignees: THALES, COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES, UNIVERSITE DE LIMOGES, CENTRE NATIONAL DE LA RECHERCHE SCIENTIFIQUE
    Inventors: Olivier Jardel, Raymond Quere, Stéphane Piotrowicz, Philippe Bouysse, Sylvain Delage, Audrey Martin
  • Publication number: 20170047924
    Abstract: A power switching cell with normally on field-effect transistors comprises a current switch receiving the control input signal over an activation input and a power transistor for switching a high voltage VDD applied to its drain, to its source that is connected to the output port of the cell. The control of the gate of the power transistor whose source is floating, according to the input signal, is provided by a self-biasing circuit connected between its gate and source. The current switch is connected between the self-biasing circuit and a zero or negative reference voltage. The self-biasing circuit comprises a transistor whose source or drain is connected to the gate or source of the power transistor. The gate of this transistor is biased by a resistor connected between its gate and source, and between the current switch and the source. The transistors are HEMT transistors using GaN or AsGa technology.
    Type: Application
    Filed: April 17, 2015
    Publication date: February 16, 2017
    Inventors: Olivier JARDEL, Raymond QUERE, Stéphane PIOTROWICZ, Philippe BOUYSSE, Sylvain DELAGE, Audrey MARTIN
  • Publication number: 20050178590
    Abstract: An apparatus includes a support surface for a human. The support surface has a lower portion and a back portion, with an aperture formed therein. A weight measurement device is coupled with the support surface, such that when a human is supported by the support surface the human's perineum is positioned over the aperture and the human's weight can be measured by the weight measurement device.
    Type: Application
    Filed: February 13, 2004
    Publication date: August 18, 2005
    Inventors: Audrey Martin-Woodin, Darrell Shelton