Abstract: In a general aspect, a method for producing an optoelectronic device includes forming a mechanically-compliant layer on a substrate, and forming a second layer, the mechanically-compliant layer being disposed between the second layer and the substrate. The method also includes performing a relaxation operation to facilitate a release of strain energy in the second layer by the mechanically-compliant layer. The mechanically-compliant layer, the second layer and the relaxation operation are configured such that a surface of the second layer has an extended defect density below a predetermined value. The method also includes forming a light-emitting region, the second layer being disposed between the light-emitting region and the substrate. The extended defect density being below the predetermined value results in a leakage resistance in an active region of the light-emitting region that is higher than 10 milliohms per centimeter-squared (mOhm/cm2).

Abstract: A micro-LED driver applies a low baseline power (i.e., a baseline voltage or current) to pre-charge a micro-LED in a nominally-off (i.e., non-light-emitting) state in addition to applying an operating driving power to drive the micro-LED in a light-emitting state. By pre-charging the micro-LED prior to applying the operating driving power, the micro-LED driver significantly decreases the time between application of the operating driving power and onset of emission of light from the micro-LED. In some embodiments, the micro-LED driver applies an operating driving power having multiple phases of current density to reduce the time between application of the operating driving power and onset of emission of light from the micro-LED.

Abstract: Methods and devices are presented for transforming a layout of a densely packed grid of micro-LED light emitters to a layout of a square rectilinear pixel grid to achieve compatibility with hardware and software used in imaging and display technologies. In particular, a pattern of regular hexagonal emitter cells for fabrication on a III-nitride substrate can be transformed to a square pixel array of irregular hexagonal trichrome pixels that are readily addressable. Separation between adjacent trichrome pixels, and between their constituent emitters, can be established for overlay tolerance, while maintaining a cell packing density of about 70% and a pixel pitch of about 4.0 ?m. Wavelength and quantum efficiency properties are shown to depend on optical current density, which can be determined by the emitter area specified in the grid layout.

Abstract: Methods and devices are presented for transforming a layout of a densely packed grid of micro-LED light emitters to a layout of a square rectilinear pixel grid to achieve compatibility with hardware and software used in imaging and display technologies. In particular, a pattern of regular hexagonal emitter cells for fabrication on a III-nitride substrate can be transformed to a square pixel array of irregular hexagonal trichrome pixels that are readily addressable. Separation between adjacent trichrome pixels, and between their constituent emitters, can be established for overlay tolerance, while maintaining a cell packing density of about 70% and a pixel pitch of about 4.0 ?m. Wavelength and quantum efficiency properties are shown to depend on optical current density, which can be determined by the emitter area specified in the grid layout.

Abstract: In a general aspect, a method for growing an InGaN optoelectronic in a reaction chamber, by MOCVD, includes controlling a surface temperature of a wafer to be at least 750° C. during growth of a light-emitting layer. The light emitting layer includes an InGaN quantum well layer having an In % of greater than 25%. The method further includes providing an indium-containing metalorganic precursor and a gallium-containing metalorganic precursor into the reaction chamber and to the wafer during growth of the light-emitting layer when the surface temperature of the wafer is greater than 750° C. The method also includes providing an N-containing species to the wafer at a rate such that a partial pressure of the N-containing species at the surface of the wafer is greater than 1.5 atmospheres during growth of the light-emitting layer of the optoelectronic device when the surface temperature of the wafer is greater than 750° C.

Abstract: A method of forming an LED emitter includes: providing a III-nitride layer on a substrate (310), the III-nitride layer having a planar top surface; providing discrete lateral growth regions on the top surface; selectively epitaxially growing, on each discrete lateral growth region, a base region (1210) comprising an In(x)Ga(1-x)N material, each extending perpendicular to the top surface; providing surfaces of the In(x)Ga(1-x)N material on portions of the base regions (1210), the surfaces having a relaxed strain and being characterized by a base lattice constant within 0.1% of its bulk relaxed value; and epitaxially growing LED regions on the surfaces, the LED regions including light-emitting layers of In(y)Ga(1-y)N material that are pseudomorphic with the surfaces of the In(x)Ga(1-x)N material, and characterized by an active region (1240) lattice constant within 0.1% of the base lattice constant, wherein 0.05<x<0.2 and y>0.3.

Abstract: In a general aspect, a micro-LED includes a semiconductor mesa having a lateral dimension less than 5 um along a horizontal direction of the micro-LED, and a contact formed on a non-horizontal face of the semiconductor mesa. The semiconductor mesa includes a plurality of quantum wells (QWs), and a p-type semiconductor layer formed between the contact and the plurality of QWs. The contact, the p-type semiconductor layer and the plurality of QWs are configured such that, when the micro-LED is driven at an effective current density less than 50 A/cm2, holes are injected from the contact to the plurality of QWs through the p-type semiconductor layer. The injected holes diffuse laterally in the plurality of QWs over a distance greater than 1 micrometer (?m).

Abstract: A laser display system 100 is configured to increase the dynamic range of a laser diode by modulating an operating current applied to the laser diode based on a desired sequence of brightness levels and a temperature of the laser diode. In some embodiments, a measuring circuit measures a voltage of the laser diode at a given current, which indirectly indicates the temperature of the laser diode, thus obviating the need for a direct measurement of temperature. In addition, in some embodiments, the measuring circuit identifies a threshold current of the laser diode based on a range of current values at which values of the current multiplied by the derivative of the voltage against the current vary relatively rapidly. By compensating for temperature effects and identifying the threshold current, a driver of the laser diode more precisely controls light output of the laser diode across an increased dynamic range.

Abstract: A full color display includes multiple pixels and has a white point, a direction of emission and a solid angle of emission around the direction of emission characterized by a half-cone angle ?. Each pixel includes: a sub-pixel including a red LED having a first geometry emitting red light into a range of emission angles, such that a fraction of the power emitted within the solid angle of emission is at least 1.2*(1?cos(?)2); a sub-pixel including a green LED having a second geometry emitting green light into a range of emission angles, such that a fraction of the power emitted within the solid angle of emission is at least 1.2*(1?cos(?)2); and a sub-pixel including a blue LED emitting blue light into a range of emission angles, such that a fraction of the power emitted within the solid angle of emission is at least 1.2*(1?cos(?)2).

Abstract: A micro-LED driver applies a low baseline power (i.e., a baseline voltage or current) to pre-charge a micro-LED in a nominally-off (i.e., non-light-emitting) state in addition to applying an operating driving power to drive the micro-LED in a light-emitting state. By pre-charging the micro-LED prior to applying the operating driving power, the micro-LED driver significantly decreases the time between application of the operating driving power and onset of emission of light from the micro-LED. In some embodiments, the micro-LED driver applies an operating driving power having multiple phases of current density to reduce the time between application of the operating driving power and onset of emission of light from the micro-LED.

Abstract: A light emitting device is described. The light emitting device includes a substrate and a semiconductor structure. The semiconductor structure includes a light emitting layer disposed between an n-type region and a p-type region and has a first surface adjacent the substrate and a second surface opposite the first surface. The first surface of the semiconductor structure multiple cavities formed therein, which extend into at least one of the n-type region and the p-type region. The cavities are spaced apart and lined by a dielectric layer. At least a portion of the second surface is roughened to form multiple features spaced apart at a distance smaller than a distance between each of the cavities formed in the first surface to enhance extraction of light emitted from the light emitting layer. At least one contact is disposed between the first surface of the semiconductor structure and the substrate.

Abstract: Methods and apparatus are described. An apparatus includes a hexagonal oxide substrate and a III-nitride semiconductor structure adjacent the hexagonal oxide substrate. The III-nitride semiconductor structure includes a light emitting layer between an n-type region and a p-type region. The hexagonal oxide substrate has an in-plane coefficient of thermal expansion (CTE) within 30% of a CTE of the III-nitride semiconductor structure.

Abstract: A light emitting device is described. The light emitting device includes a substrate and a semiconductor structure. The semiconductor structure includes a light emitting layer disposed between an n-type region and a p-type region and has a first surface adjacent the substrate and a second surface opposite the first surface. The first surface of the semiconductor structure multiple cavities formed therein, which extend into at least one of the n-type region and the p-type region. The cavities are spaced apart and lined by a dielectric layer. At least a portion of the second surface is roughened to form multiple features spaced apart at a distance smaller than a distance between each of the cavities formed in the first surface to enhance extraction of light emitted from the light emitting layer. At least one contact is disposed between the first surface of the semiconductor structure and the substrate.

Abstract: Methods and apparatus are described. An apparatus includes a hexagonal oxide substrate and a III-nitride semiconductor structure adjacent the hexagonal oxide substrate. The III-nitride semiconductor structure includes a light emitting layer between an n-type region and a p-type region. The hexagonal oxide substrate has an in-plane coefficient of thermal expansion (CTE) within 30% of a CTE of the III-nitride semiconductor structure.

Abstract: Methods and apparatus are described. An apparatus includes a hexagonal oxide substrate and a III-nitride semiconductor structure adjacent the hexagonal oxide substrate. The III-nitride semiconductor structure includes a light emitting layer between an n-type region and a p-type region. The hexagonal oxide substrate has an in-plane coefficient of thermal expansion (CTE) within 30% of a CTE of the III-nitride semiconductor structure.

Abstract: A light emitting device is described. The light emitting device includes a substrate and a semiconductor structure. The semiconductor structure includes a light emitting layer disposed between an n-type region and a p-type region and has a first surface adjacent the substrate and a second surface opposite the first surface. The first surface of the semiconductor structure multiple cavities formed therein, which extend into at least one of the n-type region and the p-type region. The cavities are spaced apart and lined by a dielectric layer. At least a portion of the second surface is roughened to form multiple features spaced apart at a distance smaller than a distance between each of the cavities formed in the first surface to enhance extraction of light emitted from the light emitting layer. At least one contact is disposed between the first surface of the semiconductor structure and the substrate.

Abstract: Structures are incorporated into a semiconductor light emitting device which may increase the extraction of light emitted at glancing incidence angles. In some embodiments, the device includes a low index material that directs light away from the metal contacts by total internal reflection. In some embodiments, the device includes extraction features such as cavities in the semiconductor structure which may extract glancing angle light directly, or direct the glancing angle light into smaller incidence angles which are more easily extracted from the device.

Abstract: A light emitting device is described. The light emitting device includes a substrate and a semiconductor structure. The semiconductor structure includes a light emitting layer disposed between an n-type region and a p-type region and has a first surface adjacent the substrate and a second surface opposite the first surface. The first surface of the semiconductor structure multiple cavities formed therein, which extend into at least one of the n-type region and the p-type region. The cavities are spaced apart and lined by a dielectric layer. At least a portion of the second surface is roughened to form multiple features spaced apart at a distance smaller than a distance between each of the cavities formed in the first surface to enhance extraction of light emitted from the light emitting layer. At least one contact is disposed between the first surface of the semiconductor structure and the substrate.

Abstract: Methods and apparatus are described. An apparatus includes a hexagonal oxide substrate and a III-nitride semiconductor structure adjacent the hexagonal oxide substrate. The III-nitride semiconductor structure includes a light emitting layer between an n-type region and a p-type region. The hexagonal oxide substrate has an in-plane coefficient of thermal expansion (CTE) within 30% of a CTE of the III-nitride semiconductor structure.

Abstract: In embodiments of the invention, a semiconductor structure comprising a III-nitride light emitting layer disposed between an n-type region and a p-type region is grown on a substrate. The substrate is a non-III-nitride material. The substrate has an in-plane lattice constant asubstrate. At least one III-nitride layer in the semiconductor structure has a bulk lattice constant alayer and [(|asubstrate?alayer|)/asubstrate]*100% is no more than 1%. A surface of the substrate opposite the surface on which the semiconductor structure is grown is textured.