Patents by Inventor Aurelien Mozipo

Aurelien Mozipo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12292752
    Abstract: An electronic system includes first, second, third, and fourth integrated circuit dies. The third integrated circuit die has a first voltage regulator circuit. A supply voltage output of the first voltage regulator circuit is coupled to provide a first supply voltage to a supply voltage input of the first integrated circuit die. The first voltage regulator circuit generates a first power ready signal that indicates when the first supply voltage has reached a first threshold voltage. The fourth integrated circuit die has a second voltage regulator circuit that generates a second supply voltage in response to the first power ready signal. A supply voltage output of the second voltage regulator circuit is coupled to provide the second supply voltage to a supply voltage input of the second integrated circuit die.
    Type: Grant
    Filed: September 24, 2020
    Date of Patent: May 6, 2025
    Assignee: Altera Corporation
    Inventors: Aurelien Mozipo, Archanna Srinivasan, Guang Chen, Janani Chandrasekhar
  • Publication number: 20240027279
    Abstract: A method is provided for thermally monitoring an integrated circuit during operation of the integrated circuit. The method includes receiving a measurement of a temperature in a circuit design for the integrated circuit from a temperature sensor, and determining a hottest temperature in the circuit design based on the measurement of the temperature. A non-transitory computer readable storage medium includes computer readable instructions stored thereon for causing a computing system to receive a measurement of a first temperature in a circuit design for an integrated circuit from a temperature sensor, and determine a second temperature of a cold spot in an active region of the circuit design by adjusting the measurement of the first temperature generated by the temperature sensor by an offset.
    Type: Application
    Filed: September 28, 2023
    Publication date: January 25, 2024
    Applicant: Intel Corporation
    Inventors: Krishnakumar Varadarajan, Aurelien Mozipo, Juan Cevallos Palomeque, Teik Wah Lim, Aanandh Balasubramanian
  • Publication number: 20210004032
    Abstract: An electronic system includes first, second, third, and fourth integrated circuit dies. The third integrated circuit die has a first voltage regulator circuit. A supply voltage output of the first voltage regulator circuit is coupled to provide a first supply voltage to a supply voltage input of the first integrated circuit die. The first voltage regulator circuit generates a first power ready signal that indicates when the first supply voltage has reached a first threshold voltage. The fourth integrated circuit die has a second voltage regulator circuit that generates a second supply voltage in response to the first power ready signal. A supply voltage output of the second voltage regulator circuit is coupled to provide the second supply voltage to a supply voltage input of the second integrated circuit die.
    Type: Application
    Filed: September 24, 2020
    Publication date: January 7, 2021
    Applicant: Intel Corporation
    Inventors: Aurelien Mozipo, Archanna Srinivasan, Guang Chen, Janani Chandrasekhar
  • Publication number: 20190073020
    Abstract: An embodiment of a semiconductor package apparatus may include technology to independently bring a first memory power node one of online and offline based on a runtime memory control signal, and independently bring a second memory power node one of online and offline based on the runtime memory control signal. Other embodiments are disclosed and claimed.
    Type: Application
    Filed: September 1, 2017
    Publication date: March 7, 2019
    Applicant: Intel Corporation
    Inventor: Aurelien Mozipo
  • Publication number: 20050219883
    Abstract: A device and method for dynamically optimizing a power converter is disclosed. The dynamically optimized power converter unit includes a processor that maximizes efficiency of a power converter supplying energy to a load.
    Type: Application
    Filed: February 24, 2004
    Publication date: October 6, 2005
    Inventors: Robert Maple, Aurelien Mozipo, Brian Denta