Abstract: Systems and methods of operating a computing system may involve receiving, at a control interface, an instruction to alter a power state at a memory device, and directing, by the control interface, a controller to control a power supply to a memory device channel to alter the power state in the memory device.

Abstract: Systems and methods of operating a computing system may involve receiving, at a control interface, an instruction to alter a power state at a memory device, and directing, by the control interface, a controller to control a power supply to a memory device channel to alter the power state in the memory device.

Abstract: Systems and methods of operating a computing system may involve receiving, at a control interface, an instruction to alter a power state at a memory device, and directing, by the control interface, a controller to control a power supply to a memory device channel to alter the power state in the memory device.

Abstract: The switching sequence of a phase-shifted zero-voltage-transition (PS-ZVT) full bridge converter circuit is alternated between two modes by periodically reversing the switching sequence for diagonally opposed switching devices of the bridge. Over a period of operation, each of the switching devices periodically conduct the entire free-wheeling current that occurs during load current reversal transitions so as to balance their average power dissipation and reduce the overall power dissipation of the converter circuit.

Abstract: The switching sequence of a phase-shifted zero-voltage-transition (PS-ZVT) full bridge converter circuit is alternated between two modes by periodically reversing the switching sequence for diagonally opposed switching devices of the bridge. Over a period of operation, each of the switching devices periodically conduct the entire free-wheeling current that occurs during load current reversal transitions so as to balance their average power dissipation and reduce the overall power dissipation of the converter circuit.

Abstract: A device and method for dynamically optimizing a power converter is disclosed. The dynamically optimized power converter unit includes a processor that maximizes efficiency of a power converter supplying energy to a load.

Abstract: A DC/DC converter employing synchronous rectification includes an energy transfer switch, a diode, a synchronous switch, a processor and a memory subsystem. The processor estimates a diode conduction time and provides a control signal to the synchronous switch to cause the synchronous switch to conduct for a period of time equal to the estimated diode conduction time.

Abstract: Method and system for bi-directionally controlling power flow between two separate direct current power sources in a multi-stage power converter system are provided. The method allows providing at least first and second power converter stages coupled in parallel circuit to one another. The method further allows providing a first switching controller coupled to selectively actuate a pair of switching devices in the first power converter stage, and a second switching controller coupled to selectively actuate a pair of switching devices in the second power converter stage. One of the first and second switching controllers is selected as a master controller, and the other one of the first and second switching controllers is selected as a slave controller. An average voltage measurement is determined at a respective node of each the power converter stages. A compensating signal is generated based on the difference of the average voltage measurements at the respective nodes of each of the power converter stages.