Patents by Inventor Avdhesh Palliwal

Avdhesh Palliwal has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9710582
    Abstract: Implementing a circuit design may include, responsive to a user input selecting a design, executing an implementation script of the design using the processor. Executing the implementation script may generate instructions for generating a circuit design from the design. Responsive to the instructions and using the processor, cores of the design may be automatically instantiated and connected.
    Type: Grant
    Filed: December 18, 2015
    Date of Patent: July 18, 2017
    Assignee: XILINX, INC.
    Inventors: Sumit Nagpal, Siddharth Rele, Avdhesh Palliwal
  • Patent number: 8938704
    Abstract: An exemplary method of implementing a circuit design for a programmable integrated circuit (IC) includes, on at least one programmed processor, performing operations including: generating a description of circuit components of the circuit design including first portion of a circuit module that is independent of assignment of resources of the programmable IC; assigning a plurality of the resources of the programmable IC to a plurality of the circuit components including determining at least one resource assignment for the circuit module; and generating a physical implementation of the circuit components for implementation in the programmable IC, including generating a second portion of the circuit module that is dependent on the at least one resource assignment, and combining the second portion of the circuit module with the first portion of the circuit module.
    Type: Grant
    Filed: July 28, 2014
    Date of Patent: January 20, 2015
    Assignee: Xilinx, Inc.
    Inventors: Siddharth Rele, David A. Knol, Sumit Nagpal, Avdhesh Palliwal, Brendan M. O'Higgins
  • Patent number: 8769477
    Abstract: A user interface for a computer-aided design tool includes a display. The display includes a visualization of a processor system of a system-on-a-chip (SOC). The visualization includes a plurality of blocks and each block represents a component of the processor system. Each block visually indicates a configuration status of the component represented by the block.
    Type: Grant
    Filed: January 31, 2013
    Date of Patent: July 1, 2014
    Assignee: Xilinx, Inc.
    Inventors: Yogesh Gathoo, Siddharth Rele, Gregory A. Brown, Avdhesh Palliwal, Gangadhar Budde, Sumit Nagpal