Abstract: Channel status management system for multi-channel LIU. A method for managing status information in a multi-channel Line Interface Unit (LIU) embodied in an integrated circuit and having a plurality of channels and operable to generate a plurality of status signals regarding the status of various associated parameters relating to the operation of the LIU The method includes the steps of first providing a plurality of channel registers in channel register space for each of the channels in the LIU, select ones of the registers designated for storing status information for the associated channel and wherein there can be a change of state of the status for any parameter associated with the operation of the associated channel. Upon the occurrence of a change of state (CoS) for any of the status information, a CoS indication is provided therefor. A channel status information system (CSM) is provided for monitoring for the occurrence of a CoS indication at any of the channels.

Abstract: A processor core suitable for use with a wide variety of instruction fetch units. The processor core contains a plurality of pipe stages including an instruction pointer generation stage and a decode stage. The core bundles all control necessary for downstream pipeline operation with an instruction address in a first stage. The bundle is transmitted outside the core to the instruction fetch unit. The instruction fetch unit fetches the instruction and adds it to the bundle, before forwarding the bundle as modified back within the core and down the pipeline. In this way, an external pipe stage is introduced providing a connection between discontinuous pipe stages in the core. Additionally, by bundling the control signals and address information in a single bundle that traverses the external pipe stage as a group, synchronization concerns are reduced or eliminated.