Abstract: A signal processing device comprising at least one control unit arranged to receive at least one pack-insert instruction, decode the received at least one pack-insert instruction, and output at least one pack-insert control signal in accordance with the received pack-insert instruction. The signal processing device further comprising at least one pack-insert component arranged to receive at least a first data block to be inserted into a sequence of data blocks to be output to at least one destination register, receive a plurality of further data blocks to be packed within the sequence of data blocks to be output to the at least one destination register, arrange the at least first data block and the plurality of further data blocks into a sequence of data blocks based at least partly on the at least one pack-insert control signal, and output the sequence of data blocks.

Abstract: The present application relates to a Common Public Radio Interface, CPRI, lane controller and a method of operating thereof. The CPRI lane controller comprises a transaction counter, a symbol counter and a comparator. The transaction counter is provided for maintaining a current aggregated transactions' size, Sizetrans, representative of an accumulated size of DMA transactions performed by a DMA controller in response to symbols transferred on a CPRI link from or to the CPRI lane controller. The symbol counter is provided for maintaining a current aggregated expected symbols' size, Sizeexp, representative of an accumulated size of a sequence of transferred symbols and a currently transferred symbol. The comparator is configured to issue a symbol awareness signal, SAS, in case the current aggregated transactions' size, Sizetrans, exceeds the current aggregated expected symbols' size, Sizeexp.

Abstract: The present application relates to a Common Public Radio Interface, CPRI, lane controller and a method of operating thereof. The CPRI lane controller comprises a transaction counter, a symbol counter and a comparator. The transaction counter is provided for maintaining a current aggregated transactions' size, Sizetrans, representative of an accumulated size of DMA transactions performed by a DMA controller in response to symbols transferred on a CPRI link from or to the CPRI lane controller. The symbol counter is provided for maintaining a current aggregated expected symbols' size, Sizeexp, representative of an accumulated size of a sequence of transferred symbols and a currently transferred symbol. The comparator is configured to issue a symbol awareness signal, SAS, in case the current aggregated transactions' size, Sizetrans, exceeds the current aggregated expected symbols' size, Sizeexp.

Abstract: A signal processing device comprising at least one control unit arranged to receive at least one pack-insert instruction, decode the received at least one pack-insert instruction, and output at least one pack-insert control signal in accordance with the received pack-insert instruction. The signal processing device further comprising at least one pack-insert component arranged to receive at least a first data block to be inserted into a sequence of data blocks to be output to at least one destination register, receive a plurality of further data blocks to be packed within the sequence of data blocks to be output to the at least one destination register, arrange the at least first data block and the plurality of further data blocks into a sequence of data blocks based at least partly on the at least one pack-insert control signal, and output the sequence of data blocks.

Abstract: A signal processing device comprising at least one control unit arranged to receive at least one bit-expand instruction, decode the received at least one bit-expand instruction, and output at least one control signal in accordance with the received at least one bit-expand instruction. The signal processing device further includes at least one execution unit component arranged to receive at least one source register value comprising at least one data bit to be expanded, extract at least one data bit from the at least one source register value located at an offset position according to the at least one control signal, expand the at least one extracted data bit into at least one multi-bit data type, and output the at least one multi-bit data type to at least one destination register.

Abstract: This invention discloses carrier beads comprising a hydrocolloid polymer comprising at least one inert filler material, wherein the at least one filler material provides improved properties including increased mechanical strength and/or reduced porosity relative to a bead without said at least one filler. The beads are useful per se or for delivery of active agents. Methods for preparation of the beads and the uses thereof are described particularly for controlling the rate of release an active agent from said bead.

Abstract: The present invention discloses therapeutic natural products, in particular plant extracts effective in treating and preventing urinary tract disorders, and method for obtaining said extracts. In particular, the present invention discloses a water-soluble alcoholic extract of Opuntia ficus-indica flower (NABIA extract), a component thereof (NABIA fraction) or any mixture of components thereof, which is substantially free of non water-soluble residues, and exhibits an effective alpha-1-adrenergic receptor blocking activity. Further are disclosed methods of preparing this extract and methods of inhibiting alpha-1-adrenergic receptors and/or 5-alpha-reductase, as well as of treating medical conditions associated therewith, such as urinary tract disorders.

Abstract: An integrated circuit device comprising at least one digital signal processor (DSP) module, the at least one DSP module comprising a first data register and at least one further data register and at least one data execution unit (DEU) module arranged to execute operations on target data stored within the first data register and the at least one further data register. The at least one DEU module is arranged, upon receipt of a conditional negation instruction, to retrieve at least one conditional bit value from the first data register, and conditionally perform negation of target data within the at least one further data register according to the at least one retrieved conditional bit value.

Abstract: The present invention discloses therapeutic natural products, in particular plant extracts effective in treating and preventing urinary tract disorders, and method for obtaining said extracts. In particular, the present invention discloses a water-soluble alcoholic extract of Opuntia ficus-indica flower (NABIA extract), a component thereof (NABIA fraction) or any mixture of components thereof, which is substantially free of non water-soluble residues, and exhibits an effective alpha-1-adrenergic receptor blocking activity. Further are disclosed methods of preparing this extract and methods of inhibiting alpha-1-adrenergic receptors and/or 5-alpha-reductase, as well as of treating medical conditions associated therewith, such as urinary tract disorders.

Abstract: This invention discloses carrier beads comprising a hydrocolloid polymer comprising at least one inert filler material, wherein the at least one filler material provides improved properties including increased mechanical strength and/or reduced porosity relative to a bead without said at least one filler. The beads are useful per se or for delivery of active agents. Methods for preparation of the beads and the uses thereof are described particularly for controlling the rate of release an active agent from said bead.

Abstract: An ADSL modem includes a modulator unit with an output analog expander and/or a demodulator unit with an input analog compressor. The modulator unit further includes (a) a first DSP engine outputting a plurality of k-bit words to a non-linear discrete compressor, which compresses the words into plurality of m-bit words wherein m<k; and (b) a digital-to-analog unit that converts the m-bit words into an analog signal for input to the analog expander.

Abstract: A method of calculating TEQ and FEQ coefficients in a discrete multi-tone (DMT) system includes determining an estimated channel impulse response. A frame delay is determined based upon the estimated channel impulse response. Using these parameters and a known training sequence, the method generates the TEQ coefficients. The method then generates the FEQ coefficients based upon the TEQ coefficients and a version of the estimated channel impulse response.