Abstract: In some examples, a system for decorating network traffic flows with outlier scores includes a processor and a memory device to store traffic flows received from a network. The processor is configured to receive a set of traffic flows from the memory device and generate a tree model to split the traffic flows into clusters of traffic flows. Each cluster corresponds with a leaf of the tree model. The processor is further configured to generate machine learning models for each of the clusters of traffic flows separately. For a new traffic flow, the processor is configured to identify a specific one of the machine learning models that corresponds with the new traffic flow, compute an outlier score for the new traffic flow using the identified specific one of the machine learning models, and decorate the new traffic flow with the outlier score.

Abstract: A system to provide an information technology (IT) interface. The system includes an IT ticket information engine to detect a user input action that indicates a selection of an IT ticket, or its associated stakeholder, that represents an IT services request and specifies one or more ticket stakeholders. The system also includes a display engine coupled to a display device, where the display engine is configured to, as a result of the IT ticket or stakeholder being selected by the user input action, cause the display device to display multiple contact options for one of the ticket stakeholders in the IT interface. The IT ticket information engine compiles the multiple contact options from one or more applications separate from the IT interface.

Abstract: Methods and apparatus relating to power management for multiple processor cores are described. In one embodiment, one or more techniques may be utilized locally (e.g., on a per core basis) to manage power consumption in a processor. In another embodiment, power may be distributed among different power planes of a processor based on energy-based considerations. Other embodiments are also disclosed and claimed.

Abstract: Methods and apparatus relating to power management for multiple processor cores are described. In one embodiment, one or more techniques may be utilized locally (e.g., on a per core basis) to manage power consumption in a processor. In another embodiment, power may be distributed among different power planes of a processor based on energy-based considerations. Other embodiments are also disclosed and claimed.

Abstract: A method for dynamically operating a multi-core processor system is provided. The method involves ascertaining currently active processor cores, identifying a currently active processor core having a lowest operating frequency, and adjusting at least one operational parameter according to voltage-frequency characteristics corresponding to the identified processor core to fulfill a predefined functional mode, e.g. power optimization mode, performance optimization mode and mixed mode.

Abstract: A technique to dynamically maintain the thermal levels of a plurality of cores of a processing system by interleave core hopping with throttling techniques. The interleaving logic may transfer execution of threads from a hot core to a cold if core hopping is applicable. Core hopping may be applicable if there exist a cold core to which the execution of threads can be assigned to from a hot core and if the rate of occurrence of core hopping is within an allowable rate value. The interleaving logic may apply throttling techniques if core hopping is not applicable. The throttling techniques may throttle the throttling parameters, which may comprise voltage, frequency, and micro-architecture throttling parameters provided to the hot core if the core hopping is not applicable.

Abstract: A method for dynamically operating a multi-core processor system is provided. The method involves ascertaining currently active processor cores, identifying a currently active processor core having a lowest operating frequency, and adjusting at least one operational parameter according to voltage-frequency characteristics corresponding to the identified processor core to fulfill a predefined functional mode, e.g. power optimization mode, performance optimization mode and mixed mode.

Abstract: Methods and apparatus relating to power management for multiple processor cores are described. In one embodiment, one or more techniques may be utilized locally (e.g., on a per core basis) to manage power consumption in a processor. In another embodiment, power may be distributed among different power planes of a processor based on energy-based considerations. Other embodiments are also disclosed and claimed.

Abstract: Methods, apparatus, and articles of manufacture control a device or system that has an operational limit related to the rate or frequency of operation. The frequency of operation is controlled at a variable rate calculated to maximize the system or apparatus performance over a calculated period of time short enough that a controlling factor, such as power consumption, does not vary significantly during the period. Known system parameters, such as thermal resistance and capacitance of an integrated circuit (IC) and its package, and measured values, such as current junction temperature in an IC, are used to calculate a time-dependent frequency of operation for the upcoming time period that results in the best overall performance without exceeding the operational limit, such as the junction temperature.

Abstract: A technique to dynamically maintain the thermal levels of a plurality of cores of a processing system by interleave core hopping with throttling techniques. The interleaving logic may transfer execution of threads from a hot core to a cold if core hopping is applicable. Core hopping may be applicable if there exist a cold core to which the execution of threads can be assigned to from a hot core and if the rate of occurrence of core hopping is within an allowable rate value. The interleaving logic may apply throttling techniques if core hopping is not applicable. The throttling techniques may throttle the throttling parameters, which may comprise voltage, frequency, and micro-architecture throttling parameters provided to the hot core if the core hopping is not applicable.

Abstract: The operating rate of an electronic system is maximized without exceeding a thermal constraint, such as a maximum junction temperature of an integrated circuit (IC) or other portion of the electronic system. An operating parameter of the system that controls the thermal output of the system is calculated for an upcoming time period based upon the previously measured thermal performance relationship to the operating parameter level. If the predicted thermal performance will exceed a maximum allowable level of the thermal constraint, then the operating parameter is reduced by an amount calculated to keep the thermal constraint at a level just below the maximum allowable level, thus resulting in an optimal control approach to maximizing the system performance while not exceeding the thermal constraint.

Abstract: Systems and methods of thermal management provide for dynamically the upper and lower operating points of a throttled device such as a processor. In one embodiment, it is determined that the temperature of the processor is below a threshold and moving the upper operating point and the lower operating point toward one another.

Abstract: The operating rate of an electronic system is maximized without exceeding a thermal constraint, such as a maximum junction temperature of an integrated circuit (IC) or other portion of the electronic system. An operating parameter of the system that controls the thermal output of the system is calculated for an upcoming time period based upon the previously measured thermal performance relationship to the operating parameter level. If the predicted thermal performance will exceed a maximum allowable level of the thermal constraint, then the operating parameter is reduced by an amount calculated to keep the thermal constraint at a level just below the maximum allowable level, thus resulting in an optimal control approach to maximizing the system performance while not exceeding the thermal constraint.

Abstract: Methods, apparatus, and articles of manufacture control a device or system that has an operational limit related to the rate or frequency of operation. The frequency of operation is controlled at a variable rate calculated to maximize the system or apparatus performance over a calculated period of time short enough that a controlling factor, such as power consumption, does not vary significantly during the period. Known system parameters, such as thermal resistance and capacitance of an integrated circuit (IC) and its package, and measured values, such as current junction temperature in an IC, are used to calculate a time-dependent frequency of operation for the upcoming time period that results in the best overall performance without exceeding the operational limit, such as the junction temperature.

Abstract: Methods, apparatus, and articles of manufacture control a device or system that has an operational limit related to the rate or frequency of operation. The frequency of operation is controlled at a variable rate calculated to maximize the system or apparatus performance over a calculated period of time short enough that a controlling factor, such as power consumption, does not vary significantly during the period. Known system parameters, such as thermal resistance and capacitance of an integrated circuit (IC) and its package, and measured values, such as current junction temperature in an IC, are used to calculate a time-dependent frequency of operation for the upcoming time period that results in the best overall performance without exceeding the operational limit, such as the junction temperature.

Abstract: Systems and methods of thermal management provide for dynamically the upper and lower operating points of a throttled device such as a processor. In one embodiment, it is determined that the temperature of the processor is below a threshold and moving the upper operating point and the lower operating point toward one another.

Abstract: Methods, apparatus, and articles of manufacture control a device or system that has an operational limit related to the rate or frequency of operation. The frequency of operation is controlled at a variable rate calculated to maximize the system or apparatus performance over a calculated period of time short enough that a controlling factor, such as power consumption, does not vary significantly during the period. Known system parameters, such as thermal resistance and capacitance of an integrated circuit (IC) and its package, and measured values, such as current junction temperature in an IC, are used to calculate a time-dependent frequency of operation for the upcoming time period that results in the best overall performance without exceeding the operational limit, such as the junction temperature.

Abstract: In a speech processing system (10) characterized by a finite range of audio levels, the speech processing system (10) receiving an incoming audio signal, the speech processing system amplifying (12) the incoming audio signal by an audio gain factor, the speech processing system (10) representing the amplified audio signal by the finite range of audio levels, a method for adjusting the audio gain factor, including the steps of: decreasing the audio gain factor when detecting clipping of the amplified audio signal, maintaining the audio gain factor for a hold time period, and increasing the gain factor when detecting that the result of amplification of the incoming sound levels by the audio gain factor, is lower than the highest level of the finite range of audio levels.