Patents by Inventor Aviad Yehezkel

Aviad Yehezkel has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11902372
    Abstract: Systems and methods enable session sharing for session-based remote direct memory access (RDMA). Multiple queue pairs (QPs) can be added to a single session and/or session group where each of the QPs has a common remote. Systems and methods may query a session ID for an existing session group and then use the session ID with an add QP request to join additional QPs to an existing session. Newly added QPs may share one or more features with existing QPs of the session group, such as encryption parameters. Additionally, newly added QPs may be configured with different performance or quality of service requirements, thereby isolating performance, and permitting true scaling for high performance computing applications.
    Type: Grant
    Filed: May 9, 2023
    Date of Patent: February 13, 2024
    Assignee: MELLANOX TECHNOLOGIES, LTD.
    Inventors: Adi Merav Horowitz, Rabia Loulou, Omri Kahalon, Gal Shalom, Aviad Yehezkel, Asaf Schwartz, Liran Liss
  • Patent number: 11861211
    Abstract: API in conjunction with a bridge chip and first and second hosts having first and second memories respectively. The bridge chip connects the memories. The API comprises key identifier registration functionality to register a key identifier for each of plural computer processes performed by the first host, thereby to define plural key identifiers; and/or access control functionality to provide at least computer process P1 performed by the first host with access, typically via the bridge chip, to at least local memory buffer M2 residing in the second memory, typically after the access control functionality first validates that process P1 has a key identifier which has been registered, e.g., via the key identifier registration functionality. Typically, the access control functionality also prevents at least computer process P2, performed by the first host, which has not registered a key identifier, from accessing local memory buffer M2, e.g., via the bridge chip.
    Type: Grant
    Filed: December 6, 2021
    Date of Patent: January 2, 2024
    Assignee: MELLANOX TECHNOLOGIES, LTD.
    Inventors: Gal Shalom, Adi Horowitz, Omri Kahalon, Liran Liss, Aviad Yehezkel, Rabie Loulou
  • Publication number: 20230379390
    Abstract: Apparatus for data communication includes a network interface for connection to a packet data network and a host interface for connection to a host computer, which includes a central processing unit (CPU) and a host memory. Packet processing circuitry receives, via the host interface, from a kernel running on the CPU, associations between multiple remote direct memory access (RDMA) sessions and multiple different User Datagram Protocol (UDP) 5-tuple, which are assigned respectively to the RDMA sessions, and receives from an application running on the CPU a request to send an RDMA message, using a selected group of one or more of the RDMA sessions, to a peer application over the packet data network, and in response to the request, transmits, via the network interface, one or more data packets using a UDP 5-tuple that is assigned to one of the RDMA sessions in the selected group.
    Type: Application
    Filed: August 1, 2023
    Publication date: November 23, 2023
    Inventors: Liran Liss, Yamin Friedman, Michael Kagan, Diego Crupnicoff, Idan Burstein, Matty Kadosh, Tzah Oved, Dror Goldenberg, Ron Yuval Efraim, Alexander Eli Rosenbaum, Aviad Yehezkel, Rabia Loulou
  • Publication number: 20230353419
    Abstract: A cross-network bridging apparatus includes a bus interface and bridging circuitry. The bus interface is configured for connecting to a system bus. The bridging circuitry is configured to translate between (i) system-bus transactions that are exchanged between one or more local devices that are coupled to the system bus and served by the system bus and one or more remote processors located across a network from the apparatus, and (ii) data units that convey the system-bus transactions, for transmitting and receiving as network packets over the network to and from the remote processors.
    Type: Application
    Filed: July 9, 2023
    Publication date: November 2, 2023
    Inventors: Daniel Marcovitch, Idan Burstein, Liran Liss, Hillel Chapman, Dror Goldenberg, Michael Kagan, Aviad Yehezkel, Peter Paneah
  • Publication number: 20230315659
    Abstract: Methods, systems, and devices for message signaled interrupt (MSI-X) tunneling on a host device exposed by a bridge connection are described. A device may receive data and a first interrupt signal from a remote destination over a network protocol. The device may receive the data and/or the first interrupt signal over the bridge connection, via a tunneled communication from the remote destination. The device may generate a second interrupt signal based on the first interrupt signal and a local interrupt configuration provided by a system bus driver of the device. The device may inject the data and the second interrupt signal over the system bus. Injecting the data and injecting the second interrupt signal may include ensuring the data is made available to the system bus driver, prior to the interrupt handler receiving the second interrupt signal.
    Type: Application
    Filed: March 29, 2022
    Publication date: October 5, 2023
    Inventors: Daniel Marcovitch, Liran Liss, Rabia Loulou, Aviad Yehezkel
  • Patent number: 11765237
    Abstract: Apparatus for data communication includes a network interface for connection to a packet data network and a host interface for connection to a host computer, which includes a central processing unit (CPU) and a host memory. Packet processing circuitry receives, via the host interface, from a kernel running on the CPU, associations between multiple remote direct memory access (RDMA) sessions and multiple different User Datagram Protocol (UDP) 5-tuple, which are assigned respectively to the RDMA sessions, and receives from an application running on the CPU a request to send an RDMA message, using a selected group of one or more of the RDMA sessions, to a peer application over the packet data network, and in response to the request, transmits, via the network interface, one or more data packets using a UDP 5-tuple that is assigned to one of the RDMA sessions in the selected group.
    Type: Grant
    Filed: April 20, 2022
    Date of Patent: September 19, 2023
    Assignee: MELLANOX TECHNOLOGIES, LTD.
    Inventors: Liran Liss, Yamin Friedman, Michael Kagan, Diego Crupnicoff, Idan Burstein, Matty Kadosh, Tzah Oved, Dror Goldenberg, Ron Yuval Efraim, Alexander Eli Rosenbaum, Aviad Yehezkel, Rabia Loulou
  • Patent number: 11750418
    Abstract: A cross-network bridging apparatus includes a bus interface and bridging circuitry. The bus interface is configured for connecting to a system bus. The bridging circuitry is configured to translate between (i) system-bus transactions that are exchanged between one or more local devices that are coupled to the system bus and served by the system bus and one or more remote processors located across a network from the apparatus, and (ii) data units that convey the system-bus transactions, for transmitting and receiving as network packets over the network to and from the remote processors.
    Type: Grant
    Filed: September 7, 2020
    Date of Patent: September 5, 2023
    Assignee: MELLANOX TECHNOLOGIES, LTD.
    Inventors: Daniel Marcovitch, Idan Burstein, Liran Liss, Hillel Chapman, Dror Goldenberg, Michael Kagan, Aviad Yehezkel, Peter Paneah
  • Publication number: 20230236769
    Abstract: Methods and systems provided herein involve extracting an input/output (I/O) operation from a packet received over an I/O pipeline, the I/O operation comprising either a read request to read data from at least one storage device or a write request to write data to the at least one storage device; determining that an address associated with the I/O operation exists in a lookup table that is provided for thin provisioning of the at least one storage device; performing one or more RAID calculations associated with the at least one storage device based on the address and the I/O operation; and accessing the at least one storage device to perform the I/O operation based on the one or more RAID calculations; and second processing component configured to carry out a second set of operations that occur when the address associated with the I/O operation does not exist in the lookup table.
    Type: Application
    Filed: January 27, 2022
    Publication date: July 27, 2023
    Inventors: Omri Kahalon, Gal Shalom, Aviad Yehezkel, Liran Liss, Oren Duer, Rabie Loulou, Maxim Gurtovoy
  • Publication number: 20230176769
    Abstract: API in conjunction with a bridge chip and first and second hosts having first and second memories respectively. The bridge chip connects the memories. The API comprises key identifier registration functionality to register a key identifier for each of plural computer processes performed by the first host, thereby to define plural key identifiers; and/or access control functionality to provide at least computer process P1 performed by the first host with access, typically via the bridge chip, to at least local memory buffer M2 residing in the second memory, typically after the access control functionality first validates that process P1 has a key identifier which has been registered, e.g., via the key identifier registration functionality. Typically, the access control functionality also prevents at least computer process P2, performed by the first host, which has not registered a key identifier, from accessing local memory buffer M2, e.g., via the bridge chip.
    Type: Application
    Filed: December 6, 2021
    Publication date: June 8, 2023
    Inventors: Gal Shalom, Adi Horowitz, Omri Kahalon, Liran Liss, Aviad Yehezkel, Rabie Loulou
  • Publication number: 20220078043
    Abstract: A cross-network bridging apparatus includes a bus interface and bridging circuitry. The bus interface is configured for connecting to a system bus. The bridging circuitry is configured to translate between (i) system-bus transactions that are exchanged between one or more local devices that are coupled to the system bus and served by the system bus and one or more remote processors located across a network from the apparatus, and (ii) data units that convey the system-bus transactions, for transmitting and receiving as network packets over the network to and from the remote processors.
    Type: Application
    Filed: September 7, 2020
    Publication date: March 10, 2022
    Inventors: Daniel Marcovitch, Idan Burstein, Liran Liss, Hillel Chapman, Dror Goldenberg, Michael Kagan, Aviad Yehezkel, Peter Paneah
  • Publication number: 20160294983
    Abstract: A method for data storage includes provisioning, in a cluster of computers, including at least first and second computers, which are connected to a packet data network, a range of RAM on the second computer for use by the first computer. Blocks of data are stored in the provisioned range for use by programs running on the first computer. Upon incurring a page fault on the first computer in response to a request for a page of virtual memory by a program running on the first computer, a block swap request is directed to the NIC of the first computer with respect to the requested page. In response to the block swap request, an RDMA read request is initiated by the NIC via the network to the NIC of the second computer, to retrieve the requested page from the provisioned range, so as to resolve the page fault.
    Type: Application
    Filed: March 30, 2015
    Publication date: October 6, 2016
    Inventors: Yevgeny Kliteynik, Aviad Yehezkel, Liran Liss, Amir Vadai, Eli Cohen, Erez Shitrit, Gabi Liron