Patents by Inventor Avinandan Sengupta

Avinandan Sengupta has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9304981
    Abstract: A method and system are provided for utilizing inter-application image overlays or virtual transparent overlays (VTOs) to communicate information between users and tools along the EDA tool chain in an EDA design flow. VTOs remain divorced from an underlying design file and are able to be manipulated by a plurality of different users in a plurality of different EDA applications or tools, all meant to operate in different stages of the design flow and perform different functions along the design path towards actual physical circuit realization and fabrication.
    Type: Grant
    Filed: September 9, 2011
    Date of Patent: April 5, 2016
    Assignee: Cadence Design Systems, Inc.
    Inventors: Sachin Patidar, Avinandan Sengupta, Chakresh Maheshwari