Patents by Inventor Avinash Laxmisha Varna

Avinash Laxmisha Varna has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11424907
    Abstract: Embodiments are directed to countermeasures for side-channel attacks on protected sign and key exchange operations. An embodiment of storage mediums includes instructions for commencing a process including an elliptic curve scalar multiplication (ESM) operation including application of a secret scalar value; splitting the secret scalar value into two random scalar values; counting a number of leading ‘0’ bits in the scalar value and skipping the number of leading ‘0’ bits in processing; performing an ESM iteration for each bit of the secret scalar value beginning with a most significant ‘1’ bit of the scalar value including a Point Addition operation and a Point Double operation for each bit on randomized points; performing ESM operation dummy iterations equal to the number of leading ‘0’ bits; and returning an output result for the ESM operation.
    Type: Grant
    Filed: June 24, 2020
    Date of Patent: August 23, 2022
    Assignee: Intel Corporation
    Inventors: Santosh Ghosh, Andrew H. Reinders, Joseph Friel, Avinash Laxmisha Varna, Manoj Sastry
  • Publication number: 20210409188
    Abstract: Embodiments are directed to countermeasures for side-channel attacks on protected sign and key exchange operations. An embodiment of storage mediums includes instructions for commencing a process including an elliptic curve scalar multiplication (ESM) operation including application of a secret scalar value; splitting the secret scalar value into two random scalar values; counting a number of leading ‘0’ bits in the scalar value and skipping the number of leading ‘0’ bits in processing; performing an ESM iteration for each bit of the secret scalar value beginning with a most significant ‘1’ bit of the scalar value including a Point Addition operation and a Point Double operation for each bit on randomized points; performing ESM operation dummy iterations equal to the number of leading ‘0’ bits; and returning an output result for the ESM operation.
    Type: Application
    Filed: June 24, 2020
    Publication date: December 30, 2021
    Applicant: Intel Corporation
    Inventors: Santosh Ghosh, Andrew H. Reinders, Joseph Friel, Avinash Laxmisha Varna, Manoj Sastry
  • Patent number: 8122501
    Abstract: One embodiment of the present invention includes a method for traitor tracing that includes performing an inner code traitor tracing on a recovered pirated digital file, the recovered digital file incorporating an inner code for assigning segments of the digital file and an outer code for assigning inner codes to individual digital files. The method also includes extracting partial information regarding the outer code from the inner code tracing. An outer code tracing procedure may then be performed using the partial information.
    Type: Grant
    Filed: June 20, 2008
    Date of Patent: February 21, 2012
    Assignee: International Business Machines Corporation
    Inventors: Hongxia Jin, Jeffrey Bruce Lotspiech, Avinash Laxmisha Varna
  • Publication number: 20100142004
    Abstract: A method that embeds a message into a document containing a number of glyphs and extracts said message from a degraded version of said document. Each symbol of the message is represented as a geometrical relationship of two discrete sets of pixels, in which the pixels in each set are adjacent. The pixels associated with the glyphs selected from the document are combined with the discrete sets of pixels to produce modified glyphs that contain the embedded message.
    Type: Application
    Filed: December 8, 2008
    Publication date: June 10, 2010
    Inventors: Shantanu Rane, Avinash Laxmisha Varna, Anthony Vetro
  • Publication number: 20090320130
    Abstract: One embodiment of the present invention includes a method for traitor tracing that includes performing an inner code traitor tracing on a recovered pirated digital file, the recovered digital file incorporating an inner code for assigning segments of the digital file and an outer code for assigning inner codes to individual digital files. The method also includes extracting partial information regarding the outer code from the inner code tracing. An outer code tracing procedure may then be performed using the partial information.
    Type: Application
    Filed: June 20, 2008
    Publication date: December 24, 2009
    Applicant: International Business Machines Corporation
    Inventors: Hongxia Jin, Jeffrey Bruce Lotspiech, Avinash Laxmisha Varna