Patents by Inventor Avinoam Kornblit
Avinoam Kornblit has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20050039661Abstract: A method and apparatus is disclosed wherein nanostructures or microstructures are disposed on a surface of a body (such as a submersible vehicle) that is adapted to move through a fluid, such as water. The nanostructures or microstructures are disposed on the surface in a way such that the contact between the surface and the fluid is reduced and, correspondingly, the friction between the surface and the fluid is reduced. In an illustrative embodiment, the surface is a surface on a submarine or other submersible vehicle (such as a torpedo). Illustratively, electrowetting principles are used to cause the fluid to at least partially penetrate the nanostructures or microstructures on the surface of the body in order to selectively create greater friction in a desired location of the surface. Such penetration may be used, for example, to create drag that alters the direction or speed of travel of the body.Type: ApplicationFiled: August 27, 2003Publication date: February 24, 2005Inventors: Avinoam Kornblit, Timofei Kroupenkine, Mary Mandich, Tobias Schneider, Joseph Taylor, Donald Weiss, Shu Yang
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Publication number: 20040191127Abstract: A method and apparatus is disclosed wherein the movement of a droplet disposed on a nanostructured or microstructured surface is determined by at least one characteristic of the nanostructure feature pattern or at least one characteristic of the droplet. In one embodiment, the movement of the droplet is laterally determined by at least one characteristic of the nanostructure feature pattern such that the droplet moves in a desired direction along a nanostructured feature pattern. In another embodiment, the movement of the droplet is determined by either at least one characteristic of the nanostructure feature pattern or at least one characteristic of the droplet in a way such that the droplet penetrates the feature pattern at a desired area and becomes substantially immobile.Type: ApplicationFiled: March 31, 2003Publication date: September 30, 2004Inventors: Avinoam Kornblit, Timofei Nikita Kroupenkine, Mary Louise Mandich, Tobias Manual Schneider, Joseph Ashley Taylor, Shu Yang
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Publication number: 20040184155Abstract: An adjustable compound optical microlens apparatus comprises first and second microlenses that are separated from one another along their optical axes. At least one of the microlenses is movable relative to the other. In a preferred embodiment, one microlens is stationary, the other movable. A MEMS controller electrically controls the position of the movable microlens relative to the stationary microlens, or the positions of at least two movable microlenses relative to one another. In a preferred embodiment, one microlens element is stationary, the other movable. A MEMS controller electrically controls the position of the movable microlens relative to the other. In accordance with one embodiment of our invention, an array of such microlens apparatuses is also contemplated, especially for applications such optical switches and routers.Type: ApplicationFiled: March 18, 2003Publication date: September 23, 2004Inventors: Avinoam Kornblit, Stanley Pau, Maria Elina Simon
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Patent number: 6511872Abstract: The present invention provides a method of manufacturing a semiconductor device. The method includes depositing a metal oxide containing a dopant and having a high dielectric constant on a substrate; wherein the metal is aluminum or silicon and the dopant is zirconium or hafnium and etching the doped metal oxide with a plasma containing a halogenated compound.Type: GrantFiled: July 10, 2001Date of Patent: January 28, 2003Assignee: Agere Systems Inc.Inventors: Vincent M. Donnelly, Jr., Avinoam Kornblit, Kalman Pelhos
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Publication number: 20030013269Abstract: The present invention provides a method of manufacturing a semiconductor device. The method includes depositing a metal oxide containing a dopant and having a high dielectric constant on a substrate; wherein the metal is aluminum or silicon and the dopant is zirconium or hafnium and etching the doped metal oxide with a plasma containing a halogenated compound.Type: ApplicationFiled: July 10, 2001Publication date: January 16, 2003Inventors: Vincent M. Donnelly, Avinoam Kornblit, Kalman Pelhos
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Publication number: 20020197838Abstract: A method of forming low stack height transistors having controllable linewidth in an integrated circuit without channeling is disclosed. A disposable hardmask of doped glass is utilized to define the gate and subsequently protect the gate (and the underlying substrate) during ion implantation which forms the source and drains. A variety of silicided and non-silicided) structures may be formed.Type: ApplicationFiled: August 20, 2002Publication date: December 26, 2002Inventors: Sailesh Chittipeddi, Taeho Kook, Avinoam Kornblit
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Patent number: 6498080Abstract: A method of forming low stack height transistors having controllable linewidth in an integrated circuit without channeling is disclosed. A disposable hardmask of doped glass is utilized to define the gate and subsequently protect the gate (and the underlying substrate) during ion implantation which forms the source and drains. A variety of silicided and non-silicided) structures may be formed.Type: GrantFiled: January 16, 1996Date of Patent: December 24, 2002Assignee: Agere Systems Guardian Corp.Inventors: Sailesh Chittipeddi, Taeho Kook, Avinoam Kornblit
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Patent number: 6228277Abstract: The specification describes an interferometric in-situ end point detection technique for plasma etching in which the end point is predicted before any overetching occurs. It is based on the recognition that the wavelength of the monitoring beam can be selected so that only a single interferometric fringe appears before clearing. Knowing there is only one fringe, detection is simplified and the etching process can be terminated while a finite but small thickness of the layer remains. This allows etching partial thicknesses of layers. It also allows a two step etch process wherein the etch chemistry can be changed to a highly selective etch to complete clearing of the layer.Type: GrantFiled: October 14, 1998Date of Patent: May 8, 2001Assignee: Lucent Technologies Inc.Inventors: Avinoam Kornblit, Tseng-Chung Lee, Heon Lee, Helen Louise Maynard
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Patent number: 6051346Abstract: The invention provides an improved process for fabricating masks suitable for use in SCALPEL and similar electron-based or ion-based lithographic processes. Specifically, the process allows use of commercially-available (100) oriented silicon substrates, and better control over the profiles of mask struts. Specifically, the struts of the mask are formed by plasma etching, using a fluorine-based gas, and a unique multilayer mask blank is fabricated to promote successful use of the plasma etch. According to an embodiment of the process, an etch stop layer is deposited onto the front surface of a silicon substrate, and a membrane layer is deposited over the etch stop layer. A scattering layer, typically tungsten, is deposited over the membrane layer. A patterning layer is deposited on the back surface of the substrate, and the desired grillage pattern for the struts is patterned into the patterning layer.Type: GrantFiled: July 23, 1998Date of Patent: April 18, 2000Assignee: Lucent Technologies Inc.Inventors: Avinoam Kornblit, James Alexander Liddle, Anthony Edward Novembre
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Patent number: 6021215Abstract: A data visualization method and apparatus permit the representation of multi-dimensional input data sequences as output sequences of closed form visual representations known as blobs. By noting changes in the shape of blobs as processing of the input sequence progresses, changes in characteristics of entities represented by the input sequence can be readily ascertained by observation. In an illustrative embodiment, a plasma etching process used in semiconductor fabrication can be observed and controlled by monitoring changes in blobs corresponding to the etching process variables.Type: GrantFiled: October 10, 1997Date of Patent: February 1, 2000Assignee: Lucent Technologies, Inc.Inventors: Avinoam Kornblit, Nacer Layadi, Tseng-Chung Lee, Edward Alois Rietman
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Patent number: 5987335Abstract: At least the power portion of the transmitter and the front end of the receiver of a base station of a wireless communication system are advantageously co-located with the antenna (or antennae), typically atop a tower or other elevated feature. Such co-location however exposes the electronics to lightning damage. This is avoided by placement of the electronics and antenna into lightning protection apparatus that is transparent to rf radiation during lightning-quiescent conditions but is a Faraday cage during a lightning strike, reverting to the transparent condition at the conclusion of the strike. This is achieved by placement of the electronics and antenna inside a housing that comprises a dielectric chamber filled with ionizable gas in contact with electrodes selected such that, during a lightning strike, current can flow between the electrodes.Type: GrantFiled: September 24, 1997Date of Patent: November 16, 1999Assignee: Lucent Technologies Inc.Inventors: George Knoedl, Jr., Avinoam Kornblit
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Patent number: 5948570Abstract: Patterning of a layer of material that can be etched with gaseous mixture of oxygen, chlorine, and nitrogen as etchant species, such as a chromium or a chromium-containing compound layer, is accomplished by using a patterned organometallic resist, such as a polymer which contains silicon or germanium. Although gaseous mixtures of chlorine and oxygen etch chromium anisotropically. Some undercut of the chromium is still observed. This undercut is controlled or eliminated by adding nitrogen to the gas mixture. Layers of material that have been patterned in this way can then be used for photolithographic masks or reticles, for X-ray masks, for e-beam masks. or for direct patterning of other, underlying layers in semiconductor integrated circuits or other devices.Type: GrantFiled: May 26, 1995Date of Patent: September 7, 1999Assignee: Lucent Technologies Inc.Inventors: Avinoam Kornblit, Anthony Edward Novembre
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Patent number: 5891784Abstract: A method of forming low stack height transistors having controllable linewidth in an integrated circuit without channeling is disclosed. A disposable hardmask of doped glass is utilized to define the gate and subsequently protect the gate (and the underlying substrate) during ion implantation which forms the source and drains. An anti-reflective coating helps protect against reflective gate notching. A variety of silicided and non-silicided) structures may be formed.Type: GrantFiled: April 27, 1995Date of Patent: April 6, 1999Assignee: Lucent Technologies, Inc.Inventors: Wan Yee Cheung, Sailesh Chittipeddi, Chong-Cheng Fu, Taeho Kook, Avinoam Kornblit, Steven Alan Lytle, Kurt George Steiner, Tungsheng Yang
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Patent number: 5326727Abstract: Pattern transfer from a resist to an underlying layer is accomplished by etching the underlying layer in a plasma comprising hydrogen bromide and oxygen. Accuracy of pattern transfer is obtained by using first and second materials underneath the resist. The first and second materials may be, e.g., polysilicon and a photoresist. Etching of the resist is performed under conditions designed to minimize changes in the horizontal dimensions.Type: GrantFiled: December 30, 1992Date of Patent: July 5, 1994Assignee: AT&T Bell LaboratoriesInventors: Taeho Kook, Avinoam Kornblit, Kolawole R. Olasupo
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Patent number: 4892635Abstract: Reactive ion etching of the planarizing layer of a multilevel resist structure utilized to make integrated-circuit devices is carried out employing a plasma derived from carbon dioxide. The etching step is characterized by high throughput, good linewidth control, negligible radiation damage and low sensitivity to process parameter variations.Type: GrantFiled: February 8, 1988Date of Patent: January 9, 1990Assignee: American Telephone and Telegraph Company AT&T Bell LaboratoriesInventor: Avinoam Kornblit
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Patent number: 4824796Abstract: A process for creating bipolar and CMOS transistors on a p-type silicon substrate is disclosed. The silicon substrate has typical n+ buried wells and field oxide regions to isolate the individual transistor devices. In accordance with the process, stacks of material are created over the gate elements of the CMOS devices and over the emitter elements of the bipolar transistors. The stacks of material over the gate elements have a silicon dioxide gate layer in contact with the epitaxial layer of the substrate, and the stacks of material over the emitter elements have a polycrystalline silicon layer in contact with the epitaxial layer. Walls of silicon dioxide are created around the stacks in order to insulate the material within the stacks from the material deposited outside of the walls. Polycrystalline silicon in contact with the epitaxial layer is deposited outside the walls surrounding the stacks.Type: GrantFiled: July 10, 1987Date of Patent: April 25, 1989Assignees: American Telephone and Telegraph Company, AT&T Bell LaboratoriesInventors: Tzu-Yin Chiu, Gen M. Chin, Ronald C. Hanson, Maureen Y. Lau, Kwing F. Lee, Mark D. Morris, Alexander M. Voshchenkov, Avinoam Kornblit, Joseph Lebowitz, William T. Lynch