Patents by Inventor Avishai Moshe Fedida

Avishai Moshe Fedida has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11188304
    Abstract: Validating microprocessor instruction execution by receiving a floating-point exception selection, receiving a validation method selection, generating validation data according to the floating-point exception selection and the validation method selection by randomly generating a first tensor element value and randomly generating a second tensor element value according to the first tensor element value and the floating-point exception selection, and executing a floating-point computation according to the validation data.
    Type: Grant
    Filed: July 1, 2020
    Date of Patent: November 30, 2021
    Assignee: International Business Machines Corporation
    Inventors: Gal Ashour, Oz Dov Hershkovitz, Michal Rimon, Karen Holtz, Silvia Melitta Mueller, Avishai Moshe Fedida