Patents by Inventor Avishay Moscovici
Avishay Moscovici has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20230288541Abstract: A LIDAR system may include a light source, a sensor, and a processor. The processor may be configured to receive from the sensor, a first output signal associated with a first laser light pulse maximally incident upon an object; receive from the sensor, a second output signal associated with a second laser light pulse partially incident upon the object; use the first output signal and the second output signal to determine a value indicative of a portion of the second laser light pulse that was incident upon the object; use the determined value to determine a location associated with an edge of the object; and generate a point cloud data point representative of the determined location associated with the edge of the object.Type: ApplicationFiled: February 8, 2023Publication date: September 14, 2023Applicant: INNOVIZ TECHNOLOGIES LTD.Inventor: Avishay Moscovici
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Publication number: 20220342047Abstract: A LIDAR system includes at least one light source; at least one deflector configured to scan light emitted by the at least one light source over a field of view of the LIDAR system; and at least one processor configured to cause the at least one deflector to scan the field of view of the LIDAR system with a first scan pattern including a first series of scan lines and subsequently with a second scan pattern including a second series of scan lines that are interlaced with the first series of scan lines to provide a single frame scan pattern, and analyze reflection signals associated with the single frame scan pattern to determine whether at least one target object present in the field of view of the LIDAR system is moving.Type: ApplicationFiled: April 26, 2022Publication date: October 27, 2022Applicant: Innoviz Technologies Ltd.Inventor: Avishay MOSCOVICI
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Patent number: 10412046Abstract: There is described a method of managing a flow of data packets in a multiple-processing entity system comprising a plurality of look-up tables adapted to store information associated to actions to be performed on packets received by the system. The method comprises storing, on a per entry basis, in a shadowed entry associated to any table entry being updated, the previous content of said table entry being updated, in association with a table entry version number, for use for managing packets received in the system prior to any update operation. It is thus possible to continue using look-up tables while updating process is being carried out for some or all of the table entries. The solution provides benefits for systems that are limited in space and cost, by use of minimal memory thanks to the storing of small shadowed data instead of full shadowed table.Type: GrantFiled: June 17, 2014Date of Patent: September 10, 2019Assignee: NXP USA, Inc.Inventors: Avishay Moscovici, Michal Silbermintz
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Patent number: 9606879Abstract: A multi-partition networking device comprising a primary partition running on a first set of hardware resources and a secondary partition running on a further set of hardware resources. The multi-partition networking device is arranged to operate in a first operating state, whereby the first set of hardware resources are in an active state and the primary partition is arranged to process network traffic, and the further set of hardware resources are in a standby state. The multi-partition networking device is further arranged to transition to a second operating state upon detection of a suspicious condition within the primary partition, whereby the further set of hardware resources are transitioned from a standby state to an active state, and to transition to a third operating state upon detection of a failure condition within the primary partition, whereby processing of network traffic is transferred to the secondary partition.Type: GrantFiled: September 29, 2014Date of Patent: March 28, 2017Assignee: NXP USA, INC.Inventors: Avishay Moscovici, Nir Erez
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Patent number: 9548906Abstract: A device is described for operating a multi-partition networking system, the device comprising hardware resources for the operation of a primary partition for performing tasks, a primary buffer for holding packets for processing within a partition of the multi-partition system and a reserve buffer. The device is arranged to allocate the primary buffer for use by the primary partition and allocate the reserve buffer for use by the primary partition when at least a suspicious condition is detected in the primary partition. A method of operating a multi-partition networking system is also described.Type: GrantFiled: November 24, 2014Date of Patent: January 17, 2017Assignee: NXP USA, INC.Inventors: Avishay Moscovici, Nir Erez
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Publication number: 20160149773Abstract: A device is described for operating a multi-partition networking system, the device comprising hardware resources for the operation of a primary partition for performing tasks, a primary buffer for holding packets for processing within a partition of the multi-partition system and a reserve buffer. The device is arranged to allocate the primary buffer for use by the primary partition and allocate the reserve buffer for use by the primary partition when at least a suspicious condition is detected in the primary partition. A method of operating a multi-partition networking system is also described.Type: ApplicationFiled: November 24, 2014Publication date: May 26, 2016Applicant: FREESCALE SEMICONDUCTOR, INC.Inventors: AVISHAY MOSCOVICI, NIR EREZ
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Publication number: 20160092323Abstract: A multi-partition networking device comprising a primary partition running on a first set of hardware resources and a secondary partition running on a further set of hardware resources. The multi-partition networking device is arranged to operate in a first operating state, whereby the first set of hardware resources are in an active state and the primary partition is arranged to process network traffic, and the further set of hardware resources are in a standby state. The multi-partition networking device is further arranged to transition to a second operating state upon detection of a suspicious condition within the primary partition, whereby the further set of hardware resources are transitioned from a standby state to an active state, and to transition to a third operating state upon detection of a failure condition within the primary partition, whereby processing of network traffic is transferred to the secondary partition.Type: ApplicationFiled: September 29, 2014Publication date: March 31, 2016Applicant: FREESCALE SEMICONDUCTOR, INC.Inventors: AVISHAY MOSCOVICI, NIR EREZ
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Publication number: 20150363448Abstract: There is described a method of managing a flow of data packets in a multiple-processing entity system comprising a plurality of look-up tables adapted to store information associated to actions to be performed on packets received by the system. The method comprises storing, on a per entry basis, in a shadowed entry associated to any table entry being updated, the previous content of said table entry being updated, in association with a table entry version number, for use for managing packets received in the system prior to any update operation. It is thus possible to continue using look-up tables while updating process is being carried out for some or all of the table entries. The solution provides benefits for systems that are limited in space and cost, by use of minimal memory thanks to the storing of small shadowed data instead of full shadowed table.Type: ApplicationFiled: June 17, 2014Publication date: December 17, 2015Applicant: FREESCALE SEMICONDUCTOR, INC.Inventors: AVISHAY MOSCOVICI, MICHAL SILBERMINTZ
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Publication number: 20150277978Abstract: The invention relates to a network processor for managing communication between a central processing unit running tasks on one or more partitions, and a PPA logic circuitry. Management portals pass messages to and from the central processing unit. A management portal communicates with one of the partitions. A resource state manager is arranged to manage resources of the PPA logic circuitry and to communicate states of the resources to the tasks via the management portals. A controller driver drives the PPA logic circuitry using information received from the resource state manager and the instructions from a data interface. The networking device does not need a separate master partition, and is allowing a programmer to deploy the system fast and with minimal risk or effort on different integrated systems.Type: ApplicationFiled: March 25, 2014Publication date: October 1, 2015Applicant: FREESCALE SEMICONDUCTOR, INC.Inventor: AVISHAY MOSCOVICI
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Patent number: 6757336Abstract: A method of receiving a signal and performing a carrier recovery, the method comprising the steps of: (a) receiving a signal Xk. (b) rotating Xk by a previous correction angle &thgr;k−1 to generate a rotated signal Qk, wherein the rotation is based upon a sine and cosine of the previous correction angle. (c) mapping the rotated signal Qk to a valid decision Ak out of a constellation. (d) generating a normalized error signal &Dgr;&thgr;k,k−1 that reflects an angular difference between a correction angle &thgr;k and the previous correction angle &thgr;k−1. (e) calculating and storing a sine and a cosine of the correction angle &thgr;k, wherein the calculation is based upon &Dgr;&thgr;k,k−1, the sine of the previous correction angle &thgr;k−1 and the cosine of the previous correction angle.Type: GrantFiled: May 4, 2000Date of Patent: June 29, 2004Assignee: Freescale Semiconductor, Inc.Inventors: Vladislav Elgart, Avishay Moscovici, Gideon Naor
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Patent number: 6678765Abstract: An embedded system that has a general purpose central processing unit CPU and a digital signal processor DSP, the CPU is adapted to perform various tasks such as code consuming tasks associated to the transmission and reception of information and the DSP is adapted to perform tasks that require less program code and that are associated to the transmission and reception of information. Most of the time the CPU can handle tasks that are not related to the transmission and reception of data.Type: GrantFiled: February 7, 2000Date of Patent: January 13, 2004Assignee: Motorola, Inc.Inventors: Avishay Moscovici, Aviram Hertzberg, Yehuda Rudin
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Patent number: 5987486Abstract: A data processing system (100) of the present invention analyses input data (10) for statistical similarities in time and determines processing steps depending on the analysis. The system (100) transfers a first data set (12) which changes at every time transition (i-1) to i into a second data set (13) to output sets (22 and 23) by a transfer function H. According to a method of the present invention, the number of calculation instructions h(n) which are performed is established by comparing consecutive old input data (12) and new input data (13). The transfer function H is thereby simplified and the number of executed instructions optimized.Type: GrantFiled: October 6, 1997Date of Patent: November 16, 1999Assignee: Motorola, Inc.Inventors: Avishay Moscovici, Yehuda Rudin