Patents by Inventor Avraham Dov Gal

Avraham Dov Gal has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9628119
    Abstract: A method is described for predistorting an input signal to compensate for non-linearities caused to the input signal in producing an output signal. The method comprises: providing an input for receiving a first input signal as a plurality of signal samples, x[n], to be transmitted over a non-linear element; providing at least one digital predistortion block comprising, a plurality of IQ predistorter cells coupled to the input, each comprising a lookup table (LUT) for generating an LUT output. The at least one digital predistortion block block is configured to apply interpolation between LUT entries for the plurality of LUTs; and generate an output signal, y[n], by each of the plurality of IQ predistorter cells by adaptively modifying the first input signal using interpolated LUT entries to compensate for distortion effects in the non-linear element.
    Type: Grant
    Filed: June 26, 2015
    Date of Patent: April 18, 2017
    Assignee: NXP USA, INC.
    Inventors: Avraham Dov Gal, Peter Zahariev Rashev, Roi Menahem Shor
  • Publication number: 20160337154
    Abstract: A digital front end channelization device for one or more carrier signals comprises a per carrier section and a composite section. The composite section may include signal processing units, each of which may include an inverse Fourier transform unit for transforming a composite carrier signal into a time domain signal, a sample detection and selection unit for detecting and selecting a peak of the time domain signal, a clipping unit for clipping the time domain composite carrier signal to produce an error signal, a Fourier transform unit for transforming the error signal into a frequency domain error signal, a frequency shaping unit for frequency shaping the frequency domain error signal, a summation unit for subtracting the frequency shaped frequency domain error signal from the composite carrier signal, and a phase selection unit for phase adjustment of the resulting signal.
    Type: Application
    Filed: October 12, 2015
    Publication date: November 17, 2016
    Inventors: ROI MENAHEM SHOR, FREDERIC PAUL FERNEZ, AVRAHAM DOV GAL, PETER ZAHARIEV RASHEV
  • Patent number: 9479374
    Abstract: A digital front end channelization device for one or more carrier signals comprises a per carrier section and a composite section. The composite section may include signal processing units, each of which may include an inverse Fourier transform unit for transforming a composite carrier signal into a time domain signal, a sample detection and selection unit for detecting and selecting a peak of the time domain signal, a clipping unit for clipping the time domain composite carrier signal to produce an error signal, a Fourier transform unit, for transforming the error signal into a frequency domain error signal, a frequency shaping unit for frequency shaping the frequency domain error signal, a summation unit for subtracting the frequency shaped frequency domain error signal from the composite carrier signal, and a phase selection unit for phase adjustment of the resulting signal.
    Type: Grant
    Filed: October 12, 2015
    Date of Patent: October 25, 2016
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Roi Menahem Shor, Frederic Paul Fernez, Avraham Dov Gal, Peter Zahariev Rashev
  • Publication number: 20150381220
    Abstract: A method is described for predistorting an input signal to compensate for non-linearities caused to the input signal in producing an output signal. The method comprises: providing an input for receiving a first input signal as a plurality of signal samples, x[n], to be transmitted over a non-linear element; providing at least one digital predistortion block comprising, a plurality of IQ predistorter cells coupled to the input, each comprising a lookup table (LUT) for generating an LUT output The at least one digital predistortion block block is configured to apply interpolation between LUT entries for the, plurality of LUTs; and generate an output signal, y[n], by each of the plurality of IQ predistorter cells by adaptively modifying the first input signal using interpolated LUT entries to compensate for distortion effects in the non-linear element.
    Type: Application
    Filed: June 26, 2015
    Publication date: December 31, 2015
    Inventors: Avraham Dov Gal, Peter Zahariev Rashev, Roi Menahem Shor