Abstract: Systems, methods, apparatuses, and computer program products for reducing data port downtime are provided. An example network interface device of the present disclosure includes a first data port and a second data port. The network interface device performs a first link training process associated with the first data port coupled to a first communication link to determine a first communication parameter set for the first communication link. The network interface device then deactivates the first data port and performs a second link training process associated the second data port coupled to a second communication link to determine a second communication parameter set. Based on a network usage parameter set associated with a data plane of the network interface device, the network interface device determines whether to activate the first data port concurrently with the second data port.

Abstract: Apparatuses, systems, and associated methods of manufacturing are described that provide a dynamic data interconnect and networking cable configuration. The dynamic data interconnect includes a substrate, transmitters supported on the substrate configured to generate signals, and receivers supported on the substrate configured to receive signals. The dynamic data interconnect further includes a number of connection pads that receive data cables attached thereto and a number of transmission lanes that operably couple the transmitters and receivers to the connection pads. The dynamic data interconnect further includes transmission circuitry in communication with each of the transmitters and receivers such that, in an operational configuration, the transmission circuitry determines a transmission state of the dynamic data interconnect and selectively disables operation of at least a portion of the transmitters or at least a portion of the receivers.

Abstract: A transceiver module for providing operational resilience is presented. The transceiver module is configured to receive first data via a first optical module in a first configuration of operation and detect, using an adapter that is operationally connected to the first optical module, an operational failure of the first optical module. In response to detecting the operational failure, the transceiver module is configured to switch, via the adapter, from the first configuration of operation to a second configuration of operation by: automatically engaging a second optical module; triggering the first data that was initially directed into a first input port of the first optical module to be directed into a second input port of the second optical module; and receiving the first data from a second output port of the second optical module.

Abstract: Systems and method are provided. An illustrative system includes a first compute node having a first processing unit, a first compute node port, and a first peripheral component interconnect bus configured to carry data between the first processing unit and the first compute node port. The system may further include a multi-host device having a first multi-host port, where the first multi-host port is configured to connect with the first compute node port via a first peripheral component interconnect cable, a network port, where the network port is configured to receive a network interface of a networking cable, and processing circuitry configured to translate and carry data between the first multi-host port and the network port.

Abstract: Systems and method are provided. An illustrative system includes a first compute node having a first processing unit, a first compute node port, and a first peripheral component interconnect bus configured to carry data between the first processing unit and the first compute node port. The system may further include a multi-host network interface controller having a first multi-host port, where the first multi-host port is configured to connect with the first compute node port via a first peripheral component interconnect cable, a network port, where the network port is configured to receive a network interface of a networking cable, and processing circuitry configured to translate and carry data between the first multi-host port and the network port.

Abstract: A synchronized communication system includes a plurality of network communication devices, one of which is designated as a root device and the others designated as slave devices. Each network communication device includes one or more ports and communications circuitry, which processes the communication signals received by the one or more ports so as to recover a respective remote clock from each of the signals. A synchronization circuit is integrated in the root device and provides a root clock signal, which is conveyed by clock links to the slave devices. A host processor selects one of the ports of one of the network communication devices to serve as a master port, finds a clock differential between the root clock signal and the respective remote clock recovered from the master port, and outputs, responsively to the clock differential, a control signal causing the synchronization circuit to adjust the root clock signal.

Abstract: A peripheral device includes a bus interface and circuitry. The bus interface is configured to connect to a peripheral bus for communicating with a host in accordance with a peripheral-bus specification that specifies a physical reset signal asserted by the host. The circuitry is configured to execute predefined logic that evaluates a reset condition that is indicative of imminent assertion of the physical reset signal by the host, and to perform a reset procedure in response to meeting the reset condition.

Abstract: Apparatuses, systems, and associated methods of manufacturing are described that provide a dynamic data interconnect and networking cable configuration. The dynamic data interconnect includes a substrate, transmitters supported on the substrate configured to generate signals, and receivers supported on the substrate configured to receive signals. The dynamic data interconnect further includes a number of connection pads that receive data cables attached thereto and a number of transmission lanes that operably couple the transmitters and receivers to the connection pads. The dynamic data interconnect further includes transmission circuitry in communication with each of the transmitters and receivers such that, in an operational configuration, the transmission circuitry determines a transmission state of the dynamic data interconnect and selectively disables operation of at least a portion of the transmitters or at least a portion of the receivers.

Abstract: Systems and method are provided. An illustrative system includes a first compute node having a first processing unit, a first compute node port, and a first peripheral component interconnect bus configured to carry data between the first processing unit and the first compute node port. The system may further include a multi-host network interface controller having a first multi-host port, where the first multi-host port is configured to connect with the first compute node port via a first peripheral component interconnect cable, a network port, where the network port is configured to receive a network interface of a networking cable, and processing circuitry configured to translate and carry data between the first multi-host port and the network port.

Abstract: A synchronized communication system includes a plurality of network communication devices, one of which is designated as a root device and the others designated as slave devices. Each network communication device includes one or more ports and communications circuitry, which processes the communication signals received by the one or more ports so as to recover a respective remote clock from each of the signals. A synchronization circuit is integrated in the root device and provides a root clock signal, which is conveyed by clock links to the slave devices. A host processor selects one of the ports of one of the network communication devices to serve as a master port, finds a clock differential between the root clock signal and the respective remote clock recovered from the master port, and outputs, responsively to the clock differential, a control signal causing the synchronization circuit to adjust the root clock signal.

Abstract: A pluggable module, for testing time-synchronization signals of network elements, includes a first connector for connecting to test equipment, a second connector for connecting to a network port of a network element, and at least one driver. The at least one driver is connected between the first and second connectors and is configured to buffer and relay a time-synchronization signal between the network element and the test equipment.

Abstract: Apparatuses, systems, and associated methods of manufacturing are described that provide a networking card arrangement with increased thermal performance. An example arrangement includes a primary network card that defines a first card-to-board connection and a networking chipset supported by the primary network card. The arrangement also includes an auxiliary network card that defines a second card-to-board connection and networking cable connectors supported by the auxiliary network card that receive networking cables therein. The arrangement further includes a card connection element that operably connects the primary network card and the auxiliary network card. In an operational configuration in which the primary network card and the auxiliary network card are received by a server board via the first card-to-board connection and the second card-to-board connection, the primary network card is spaced from the auxiliary network card such that air may pass therebetween.

Abstract: In one embodiment, a computer apparatus includes a first NIC including at least one network interface port to transfer data with a first packet-data network (PDN) including a master clock to provide a clock synchronization signal S1, a first physical hardware clock (PHC) to maintain a time value T1 responsively to S1, and a first clock controller to generate a clock synchronization signal S2 responsively to S1, S2 having a frequency set responsively to S1, and send S2 over a connection to a second NIC including at least one network interface port to transfer data with a second PDN, a second PHC, and a second clock controller to receive S2, update the second PHC with a time value T2 responsively to S2, send another clock synchronization signal to network nodes in the second PDN responsively to T2, the second NIC acting as a master clock in the second PDN.

Abstract: A storage and communication apparatus for plugging into a server, includes a circuit board, a bus interface, a Medium Access Control (MAC) processor, one or more storage devices and at least one Central Processing Unit (CPU). The bus interface is configured to connect the apparatus at least to a processor of the server. The MAC is mounted on the circuit board and is configured to connect to a communication network. The storage devices are mounted on the circuit board and are configured to store data. The CPU is mounted on the circuit board and is configured to expose the storage devices both (i) to the processor of the server via the bus interface, and (ii) indirectly to other servers over the communication network.

Abstract: Apparatuses, systems, and associated methods of manufacturing are described that provide a networking card arrangement with increased thermal performance. An example arrangement includes a primary network card that defines a first card-to-board connection and a networking chipset supported by the primary network card. The arrangement also includes an auxiliary network card that defines a second card-to-board connection and networking cable connectors supported by the auxiliary network card that receive networking cables therein. The arrangement further includes a card connection element that operably connects the primary network card and the auxiliary network card. In an operational configuration in which the primary network card and the auxiliary network card are received by a server board via the first card-to-board connection and the second card-to-board connection, the primary network card is spaced from the auxiliary network card such that air may pass therebetween.

Abstract: A network interface controller that is connected to a host and a packet communications network. The network interface controller includes electrical circuitry configured as a packet processing pipeline with a plurality of stages. It is determined in the network interface controller that at least a portion of the stages of the pipeline are acceleration-defined stages. Packets are processed in the pipeline by transmitting data to an accelerator from the acceleration-defined stages, performing respective acceleration tasks on the transmitted data in the accelerator, and returning processed data from the accelerator to receiving stages of the pipeline.

Abstract: In one embodiment, an external multi-host system includes an external peripheral component bus (PCB) cable terminated with a first and second PCB connector plug, a first network host including a first processor and a first PCB connector receptacle to receive the first PCB connector plug, and a second network host including a second processor and a multi-host network interface card, which includes a network connector receptacle to receive a first network connector plug terminating a network cable, a second PCB connector receptacle to provide connectivity with the first network host and to receive the second PCB connector plug, a first PCB edge-connector to provide connectivity with the second processor, and processing circuitry to operate communication with the first network host over the external PCB cable and with the second processor via the first PCB edge-connector, and exchange network packets between the network hosts and a network.

Abstract: In one embodiment, an external multi-host system includes an external peripheral component bus (PCB) cable terminated with a first and second PCB connector plug, a first network host including a first processor and a first PCB connector receptacle to receive the first PCB connector plug, and a second network host including a second processor and a multi-host network interface card, which includes a network connector receptacle to receive a first network connector plug terminating a network cable, a second PCB connector receptacle to provide connectivity with the first network host and to receive the second PCB connector plug, a first PCB edge-connector to provide connectivity with the second processor, and processing circuitry to operate communication with the first network host over the external PCB cable and with the second processor via the first PCB edge-connector, and exchange network packets between the network hosts and a network.

Abstract: Apparatuses, systems, and associated methods of manufacturing are described that provide a networking card arrangement with increased thermal performance. An example arrangement includes a primary network card that defines a first card-to-board connection and a networking chipset supported by the primary network card. The arrangement also includes an auxiliary network card that defines a second card-to-board connection and networking cable connectors supported by the auxiliary network card that receive networking cables therein. The arrangement further includes a card connection element that operably connects the primary network card and the auxiliary network card. In an operational configuration in which the primary network card and the auxiliary network card are received by a server board via the first card-to-board connection and the second card-to-board connection, the primary network card is spaced from the auxiliary network card such that air may pass therebetween.

Abstract: A storage and communication apparatus for plugging into a server, includes a circuit board, a bus interface, a Medium Access Control (MAC) processor, one or more storage devices and at least one Central Processing Unit (CPU). The bus interface is configured to connect the apparatus at least to a processor of the server. The MAC is mounted on the circuit board and is configured to connect to a communication network. The storage devices are mounted on the circuit board and are configured to store data. The CPU is mounted on the circuit board and is configured to expose the storage devices both (i) to the processor of the server via the bus interface, and (ii) indirectly to other servers over the communication network.