Abstract: A method of determining the bit error ratio (BER) of a device under test (DUT) includes transmitting a first signal of an original test bit pattern over a first channel to a receiver of the DUT, and forward error correction (FEC) encoding the original test bit pattern of the first signal transmitted to the receiver of the DUT in a loopback mode of the DUT to generate an FEC encoded test bit pattern. The method further includes transmitting a second signal of the FEC encoded test bit pattern from a transmitter of the DUT over a second channel, and FEC decoding the FEC encoded test bit pattern of the second signal to obtain a decoded test bit pattern and comparing the decoded test bit pattern with the original test bit pattern to determine a BER of the DUT.

Abstract: A method of determining the bit error ratio (BER) of a device under test (DUT) includes transmitting a first signal of an original test bit pattern over a first channel to a receiver of the DUT, and forward error correction (FEC) encoding the original test bit pattern of the first signal transmitted to the receiver of the DUT in a loopback mode of the DUT to generate an FEC encoded test bit pattern. The method further includes transmitting a second signal of the FEC encoded test bit pattern from a transmitter of the DUT over a second channel, and FEC decoding the FEC encoded test bit pattern of the second signal to obtain a decoded test bit pattern and comparing the decoded test bit pattern with the original test bit pattern to determine a BER of the DUT.

Abstract: A test generator that determines an amplification level of an amplifier within a DFE and a method for determining the amplification level are disclosed. The test generator includes a signal generator that generates a test pattern signal characterized by a repeating digital test pattern and an offset voltage and an input signal port adapted to receive a digital DFE output signal from the DFE, the digital DFE output signal depending on the amplification level. The test generator includes an output control port that communicates a digital command word specifying a gain to be used by the amplifier in the DFE and a threshold for determining if a signal in the DFE is a logical one or logical zero. A controller determines the amplification level by measuring a BER between the test pattern and the digital DFE output signal as a function of the threshold and the offset voltage.