Patents by Inventor Aya Anzai

Aya Anzai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7476908
    Abstract: An object of the invention is to provide a light emitting device in which the variation in emission spectrum depending on an angle for seeing a surface through which light is emitted is reduced. The light emitting device of the invention includes a first insulating layer formed over a substrate, a second insulating layer formed over the first insulating layer, and a semiconductor layer formed over the second insulating layer. A gate insulating layer is formed to cover the second insulating layer and the semiconductor layer. A gate electrode is formed over the gate insulating layer. A first interlayer insulating layer is formed to cover the gate insulating layer and the gate electrode. An opening is formed through the first interlayer insulating layer, the gate insulating layer and the second insulating layer. A second interlayer insulating layer is formed to cover the first insulating layer and the opening. A light emitting element is formed over the opening.
    Type: Grant
    Filed: May 4, 2005
    Date of Patent: January 13, 2009
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Hideto Ohnuma, Aya Anzai, Masayuki Sakakura, Hiromichi Godo
  • Patent number: 7471271
    Abstract: The present invention provides a circuit configuration for applying a reverse voltage (or a reverse bias) for enhancing the reliability by controlling the degradation of the light emitting element in a display device having a pixel circuit, and a method thereof. A reverse voltage is applied to a pixel circuit having at least a switching transistor connected to a signal line, a driving transistor connected to a light emitting element, and a current controlling transistor connected to the driving transistor in series. A reverse voltage applying circuit includes an analog switch or a clocked inverter, and a reverse voltage applying transistor which is turned ON when a reverse voltage is applied.
    Type: Grant
    Filed: June 4, 2004
    Date of Patent: December 30, 2008
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Mitsuaki Osame, Aya Anzai, Yu Yamazaki, Ryota Fukumoto
  • Patent number: 7456579
    Abstract: To provide a light emitting device without nonuniformity of luminance, a correcting circuit for correcting a video signal supplied to each pixel to a light emitting device. The correcting circuit is stored with data of a dispersion of a characteristic of a driving TFT among pixels and data of a change over time of luminance of a light emitting element. Further, by correcting a video signal inputted to the light emitting device in conformity with a characteristic of the driving TFT of each pixel and a degree of a deterioration of the light emitting element based on the over-described two data, nonuniformity of luminance caused by a deterioration of an electroluminescent layer and nonuniformity of luminance caused by dispersion of a characteristic of the driving TFT are restrained.
    Type: Grant
    Filed: August 24, 2004
    Date of Patent: November 25, 2008
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Hajime Kimura, Mai Akiba, Aya Anzai, Yu Yamazaki
  • Publication number: 20080273004
    Abstract: The invention provides a shift register which can operate normally while suppressing a delay of signal and a rounding of waveform. The shift register of the invention includes a plurality of stages of flip-flop circuits each of which includes a clocked inverter. The clocked inverter includes a first transistor and a second transistor which are connected in series, a first compensation circuit including a third transistor and a fourth transistor which are connected in series, and a second compensation circuit including a fifth transistor and a transmission gate. According to the first compensation circuit, a timing at which a signal outputted from the flip-flop circuit rises or falls can be controlled in synchronization with an output of two stages before. The second compensation circuit can control a clock signal input can be controlled.
    Type: Application
    Filed: June 10, 2005
    Publication date: November 6, 2008
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Mitsuaki Osame, Aya Anzai
  • Patent number: 7442950
    Abstract: The invention has a monitoring portion which detects change of ambient temperature and degradation with time, provided with a plurality of monitoring pixels and a monitoring line. Each of the plurality of monitoring pixels has a light emitting element for monitoring, a constant current source, a switch, and a detecting circuit, and one electrode of the light emitting element for monitoring is connected to the monitoring line through the switch. The detecting circuit controls on and off of the switch, and specifically in the case where both electrodes of the light emitting element for monitoring are short-circuited, the switch is turned off. The invention having the aforementioned configuration generates no potential change of the power supply line of the pixel portion when both electrodes of a light emitting element for monitoring are short-circuited.
    Type: Grant
    Filed: December 2, 2005
    Date of Patent: October 28, 2008
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Mitsuaki Osame, Aya Anzai
  • Patent number: 7403177
    Abstract: It is characterized in that the image signal selecting the light-emission/no light-emission of the first to third light-emitting elements 112 to 114 formed by lamination is input through only the transistor for switching 107, and the specific light-emission is selectively emitted by controlling the potential of the first to third current supply lines 103 to 105.
    Type: Grant
    Filed: November 21, 2003
    Date of Patent: July 22, 2008
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yoshifumi Tanada, Aya Anzai
  • Publication number: 20080169765
    Abstract: A light emitting device and an element substrate which are capable of suppressing variations in luminance intensity of a light emitting element among pixels due to characteristic variations of a driving transistor without suppressing off-current of a switching transistor low and increasing storage capacity of a capacitor. A gate potential of a driving transistor is connected to a first scan line or a second scan line, and the driving transistor operates in a saturation region. A current controlling transistor which operates in a linear region is connected in series to the driving transistor. A video signal which transmits a light emission or non-emission of a pixel is input to the gate of the current controlling transistor through a switching transistor.
    Type: Application
    Filed: March 21, 2008
    Publication date: July 17, 2008
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Yu Yamazaki, Aya Anzai, Mitsuaki Osame
  • Publication number: 20080170005
    Abstract: A-light-emitting device which realizes a high aperture ratio and in which the quality of image is little affected by the variation in the characteristics of TFTs. A large holding capacitor Cs is not provided in the pixel portion but, instead, the channel length and the channel width of the driving TFTs are increased, and the channel capacitance is utilized as Cs. The channel length is selected to be very larger than the channel width to improve current characteristics in the saturated region, and a high VGS is applied to the driving TFTs to obtain a desired drain current. Therefore, the drain currents of the driving TFTs are little affected by the variation in the threshold voltage. In laying out the pixels, further, wiring is arranged under the partitioning wall and the driving TFTs are arranged under the wiring in order to avoid a decrease in the aperture ratio despite of an increase in the size of the driving TFT.
    Type: Application
    Filed: August 1, 2007
    Publication date: July 17, 2008
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Mitsuaki Osame, Aya Anzai, Jun Koyama, Makoto Udagawa, Masahiko Hayakawa, Shunpei Yamazaki
  • Publication number: 20080150587
    Abstract: A threshold voltage of a transistor is fluctuated because of fluctuation in film thickness of a gate insulating film or in gate length and gate width caused by differences of used substrates or manufacturing steps. In order to solve the problem, according to the present invention, there is provided a clocked inverter including a first transistor and a second transistor connected in series, and a compensation circuit including a third transistor and a fourth transistor connected in series.
    Type: Application
    Filed: December 5, 2007
    Publication date: June 26, 2008
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Mitsuaki Osame, Aya Anzai
  • Patent number: 7388562
    Abstract: A display device in which the influence of a parasitic capacitance or a wiring capacitance is suppressed without lowering OFF-current of a switching transistor or increasing the capacitance of a capacitor, and a driving method thereof using area gray scale display in particular. The display device of the invention comprises a plurality of sub pixels each including a driving transistor whose gate potential is fixed, and area gray scale display is achieved. Specifically, each of the sub pixels comprises, in addition to the driving transistor, a switching transistor, a current controlling transistor connected in series with the driving transistor, and a light emitting element.
    Type: Grant
    Filed: June 28, 2004
    Date of Patent: June 17, 2008
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Jun Koyama, Mitsuaki Osame, Aya Anzai, Yu Yamazaki, Ryota Fukumoto
  • Patent number: 7385573
    Abstract: It is provided a display device that prevents, when applying a reverse bias, an anode line and a power supply line included in a signal line driver circuit from being short-circuited, and a driving method thereof. According to the invention, a reverse bias applying circuit is provided in a scan line driver circuit or a signal line driver circuit, a signal from the reverse bias applying circuit is supplied to a transistor disposed between a signal line and an anode line, and thereby the transistor is turned off. The reverse bias applying circuit comprises an analog switch or a clocked inverter and a biasing transistor, and drives so as to invert potentials of the anode line and a cathode line and apply a reverse bias to a light emitting element, while turn off the analog switch and turn on the biasing transistor. Then, a potential of the anode line becomes equal to that of a scan line, and thereby turning off the transistor between the anode line and the signal line assuredly.
    Type: Grant
    Filed: March 25, 2004
    Date of Patent: June 10, 2008
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Mitsuaki Osame, Aya Anzai, Tomoyuki Iwabuchi, Hideyuki Ebine
  • Publication number: 20080111776
    Abstract: An object of the present invention is to provide a light emitting device that is able to suppress power consumption while a balance of white light is kept, without making a configuration of a power source circuit complicated. A power source potential corresponding to each color of a light emitting element is used as a higher electric potential of a video signal and an electric potential of a power source line in the case that a transistor for controlling a supply of electric current to the light emitting element is a p-channel TFT. Conversely, a power source potential corresponding to each color of a light emitting element is used as a lower electric potential of a video signal and an electric potential of a power source line in the case that a transistor for controlling a supply of electric current to the light emitting element is an n-channel TFT.
    Type: Application
    Filed: January 3, 2008
    Publication date: May 15, 2008
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Mitsuaki Osame, Aya Anzai, Ryota Fukumoto
  • Publication number: 20080094340
    Abstract: The data latch circuit of the invention includes a means for short-circuiting an input terminal and an output terminal of an inverter and by connecting the input terminal to one electrode of a capacitor and sampling a data signal or a reference potential to the other electrode of the capacitor, an accurate operation can be obtained without being influenced by variations in the TFT characteristics even when the amplitude of an input signal is small relatively to the width of a power supply voltage.
    Type: Application
    Filed: October 24, 2007
    Publication date: April 24, 2008
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Mitsuaki Osame, Aya Anzai
  • Patent number: 7358942
    Abstract: A light emitting device and an element substrate which are capable of suppressing variations in luminance intensity of a light emitting element among pixels due to characteristic variations of a driving transistor without suppressing off-current of a switching transistor low and increasing storage capacity of a capacitor. A gate potential of a driving transistor is connected to a first scan line or a second scan line, and the driving transistor operates in a saturation region. A current controlling transistor which operates in a linear region is connected in series to the driving transistor. A video signal which transmits a light emission or non-emission of a pixel is input to the gate of the current controlling transistor through a switching transistor.
    Type: Grant
    Filed: May 7, 2004
    Date of Patent: April 15, 2008
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yu Yamazaki, Aya Anzai, Mitsuaki Osame
  • Patent number: 7355338
    Abstract: A dual light emission panel (panel capable of displaying images on both screens) is mounted in a display device or a portable information terminal to achieve a module with a small volume. The display device of the invention comprises a display screen, a first housing and a second housing that are connected to each other, and a dual light emission panel including display screens each on the front side and the back side. The dual light emission panel is connected to the first housing, disposed between the first housing and the second housing when overlapping the first housing, and rotated around a connecting point of the dual light emission panel and the first housing.
    Type: Grant
    Filed: December 17, 2003
    Date of Patent: April 8, 2008
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Mitsuaki Osame, Aya Anzai, Shunpei Yamazaki
  • Patent number: 7352133
    Abstract: An object of the present invention is to provide a light emitting device that is able to suppress power consumption while a balance of white light is kept, without making a configuration of a power source circuit complicated. A power source potential corresponding to each color of a light emitting element is used as a higher electric potential of a video signal and an electric potential of a power source line in the case that a transistor for controlling a supply of electric current to the light emitting element is a p-channel TFT. Conversely, a power source potential corresponding to each color of a light emitting element is used as a lower electric potential of a video signal and an electric potential of a power source line in the case that a transistor for controlling a supply of electric current to the light emitting element is an n-channel TFT.
    Type: Grant
    Filed: July 31, 2003
    Date of Patent: April 1, 2008
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Mitsuaki Osame, Aya Anzai, Ryota Fukumoto
  • Publication number: 20080054265
    Abstract: The invention provides a display device and an electronic device, each of which has one of a structure in which a substrate provided with a light emitting element which performs bottom light emission and a substrate provided with a light emitting element which performs top light emission are attached, and a structure in which two substrates, each of which is provided with a light emitting element which performs bottom light emission are attached. By attaching two substrates, each of which is provided with a light emitting element, displays are provided on the front and back of the display device, thus a high added value can be realized. One of the two substrates, each of which is provided with a light emitting element also functions as a sealing substrate for another substrate, thus a compact, thin, and lightweight display device can be obtained.
    Type: Application
    Filed: October 29, 2007
    Publication date: March 6, 2008
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Mitsuaki Osame, Aya Anzai, Jun Koyama, Yasuko Watanabe, Shunpei Yamazaki
  • Publication number: 20080036709
    Abstract: The reliability of an EL element is enhanced while the increase of the electric power consumption is suppressed. It becomes possible that in a SES drive, the reverse bias is applied to the EL element driven at a constant electric current. Moreover, the application of the reverse bias is performed by varying only the counter electrode, and thus withstand voltage of TFT and the increase of the electric power consumption due to the increase of voltage of the gate signal line drive circuit, which becomes a problem when changing greatly the electric current supplying line, can be suppressed. Furthermore, the reduction of the electric power consumption can also be achieved while the enhancement of the reliability is secured by making the reverse bias smaller than the forward bias.
    Type: Application
    Filed: September 26, 2007
    Publication date: February 14, 2008
    Inventors: Aya Anzai, Mitsuaki Osame, Yoshifumi Tanada, Keisuke Miyagawa, Satoshi Seo, Shunpei Yamazaki
  • Patent number: 7327169
    Abstract: A threshold voltage of a transistor is fluctuated because of fluctuation in film thickness of a gate insulating film or in gate length and gate width caused by differences of used substrates or manufacturing steps. In order to solve the problem, according to the present invention, there is provided a clocked inverter including a first transistor and a second transistor connected in series, and a compensation circuit including a third transistor and a fourth transistor connected in series.
    Type: Grant
    Filed: September 24, 2003
    Date of Patent: February 5, 2008
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Mitsuaki Osame, Aya Anzai
  • Publication number: 20080012800
    Abstract: A display device with high-definition, in which display unevenness due to a voltage drop in a wiring or display unevenness due to a variation in characteristics of TFTs are suppressed. The display device of the invention comprises a first wiring for transmitting a video signal and a second wiring for supplying a current to a light emitting element. The first wiring and the second wiring extend parallel to each other, and are formed so as to overlap with each other at least partly with an insulating layer interposed therebetween.
    Type: Application
    Filed: July 6, 2007
    Publication date: January 17, 2008
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Masayuki Sakakura, Ritsuko Nagao, Mitsuaki Osame, Aya Anzai, Yu Yamazaki, Yoshifumi Tanada