Patents by Inventor Aya Minemura

Aya Minemura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Semiconductor memory device
    Patent number: 10083983
    Abstract: According to one embodiment, a semiconductor memory device includes a substrate, a stacked body, a semiconductor pillar, a charge storage film, and at least one columnar member. The stacked body is provided on the substrate. In the stacked body, a plurality of insulating films and a plurality of electrode films are layered together alternately. The semiconductor pillar is provided in the stacked body and extends in a stacking direction of the stacked body. The charge storage film is provided between the semiconductor pillar and the stacked body. The columnar member is provided in the stacked body and extends in the stacking direction. A lower portion of the columnar member is provided in the substrate.
    Type: Grant
    Filed: June 22, 2017
    Date of Patent: September 25, 2018
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventors: Kotaro Noda, Kyoko Noda, Aya Minemura, Kenji Sawamura
  • SEMICONDUCTOR MEMORY DEVICE
    Publication number: 20170294446
    Abstract: According to one embodiment, a semiconductor memory device includes a substrate, a stacked body, a semiconductor pillar, a charge storage film, and at least one columnar member. The stacked body is provided on the substrate. In the stacked body, a plurality of insulating films and a plurality of electrode films are layered together alternately. The semiconductor pillar is provided in the stacked body and extends in a stacking direction of the stacked body. The charge storage film is provided between the semiconductor pillar and the stacked body. The columnar member is provided in the stacked body and extends in the stacking direction. A lower portion of the columnar member is provided in the substrate.
    Type: Application
    Filed: June 22, 2017
    Publication date: October 12, 2017
    Applicant: Toshiba Memory Corporation
    Inventors: Kotaro NODA, Kyoko Noda, Aya Minemura, Kenji Sawamura
  • Semiconductor memory device
    Patent number: 9711527
    Abstract: According to one embodiment, a semiconductor memory device includes a substrate, a stacked body, a semiconductor pillar, a charge storage film, and at least one columnar member. The stacked body is provided on the substrate. In the stacked body, a plurality of insulating films and a plurality of electrode films are layered together alternately. The semiconductor pillar is provided in the stacked body and extends in a stacking direction of the stacked body. The charge storage film is provided between the semiconductor pillar and the stacked body. The columnar member is provided in the stacked body and extends in the stacking direction. A lower portion of the columnar member is provided in the substrate.
    Type: Grant
    Filed: February 19, 2016
    Date of Patent: July 18, 2017
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kotaro Noda, Kyoko Noda, Aya Minemura, Kenji Sawamura
  • SEMICONDUCTOR MEMORY DEVICE
    Publication number: 20170077127
    Abstract: According to one embodiment, a semiconductor memory device includes a substrate, a stacked body, a semiconductor pillar, a charge storage film, and at least one columnar member. The stacked body is provided on the substrate. In the stacked body, a plurality of insulating films and a plurality of electrode films are layered together alternately. The semiconductor pillar is provided in the stacked body and extends in a stacking direction of the stacked body. The charge storage film is provided between the semiconductor pillar and the stacked body. The columnar member is provided in the stacked body and extends in the stacking direction. A lower portion of the columnar member is provided in the substrate.
    Type: Application
    Filed: February 19, 2016
    Publication date: March 16, 2017
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Kotaro NODA, Kyoko Noda, Aya Minemura, Kenji Sawamura
  • Semiconductor device and method for manufacturing semiconductor device
    Patent number: 8624314
    Abstract: According to one embodiment, a semiconductor device comprises an active area extending in a first direction, a contact plug located on a first portion of the active area, and a transistor located on a second portion adjacent to the first portion of the active area in the first direction. A width of a top surface area of the first portion in a second direction perpendicular to the first direction is smaller than that of a top surface area of the second portion in the second direction.
    Type: Grant
    Filed: December 13, 2012
    Date of Patent: January 7, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Aya Minemura, Kenji Sawamura, Mitsuhiro Noguchi
  • SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
    Publication number: 20130187208
    Abstract: According to one embodiment, a semiconductor device comprises an active area extending in a first direction, a contact plug located on a first portion of the active area, and a transistor located on a second portion adjacent to the first portion of the active area in the first direction. A width of a top surface area of the first portion in a second direction perpendicular to the first direction is smaller than that of a top surface area of the second portion in the second direction.
    Type: Application
    Filed: December 13, 2012
    Publication date: July 25, 2013
    Inventors: Aya Minemura, Kenji Sawamura, Mitsuhiro Noguchi
  • Semiconductor device and method for manufacturing semiconductor device
    Patent number: 8357966
    Abstract: According to one embodiment, a semiconductor device comprises an active area extending in a first direction, a contact plug located on a first portion of the active area, and a transistor located on a second portion adjacent to the first portion of the active area in the first direction. A width of a top surface area of the first portion in a second direction perpendicular to the first direction is smaller than that of a top surface area of the second portion in the second direction.
    Type: Grant
    Filed: September 17, 2010
    Date of Patent: January 22, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Aya Minemura, Kenji Sawamura, Mitsuhiro Noguchi
  • SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
    Publication number: 20110233622
    Abstract: According to one embodiment, a semiconductor device comprises an active area extending in a first direction, a contact plug located on a first portion of the active area, and a transistor located on a second portion adjacent to the first portion of the active area in the first direction. A width of a top surface area of the first portion in a second direction perpendicular to the first direction is smaller than that of a top surface area of the second portion in the second direction.
    Type: Application
    Filed: September 17, 2010
    Publication date: September 29, 2011
    Inventors: Aya Minemura, Kenji Sawamura, Mitsuhiro Noguchi